Hi, Attached... -----Original Message----- From: [EMAIL PROTECTED] [mailto:linuxppc-embedded-bounces+hoffman=marvell.com at ozlabs.org] On Behalf Of Roger Larsson Sent: Monday, May 29, 2006 3:15 PM To: linuxppc-embedded at ozlabs.org Subject: Re: Setting I&D cache enable in the same mtspr instruction Importance: Low
Is the patch reversed? diff -Naur old new > patch And what about comments, are they all still valid? "enable and invalidate caches" is now only Data cache... In cases when I am writing code like this I try to include the reason why it is not "optimized" together in one write... (or soon someone will do that optimization). /RogerL _______________________________________________ Linuxppc-embedded mailing list Linuxppc-embedded at ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded -------------- next part -------------- A non-text attachment was scrubbed... Name: cpu_setup_6xx.patch Type: application/octet-stream Size: 1114 bytes Desc: cpu_setup_6xx.patch Url : http://ozlabs.org/pipermail/linuxppc-embedded/attachments/20060529/e6954d51/attachment.obj
