I have been working on an FX60 part with PVR 0x20011430. It has memory attached to the PLB. I have noticed some possible corruptions during linux kernel boot that appear to follow a pattern. If a variable is stored immediately before a function call is made or returns, the callee/caller when reading the value gets stale data. Print the value of the variable in-between and coherency returns.
Does that sound like a known problem? I went through the errata on solution record 20658 but nothing looked like a good fit. So I'm assuming at the moment it's some stupid bug of my own... Any suggestions gratefully appreciated. Regards, Stig Telfer On 1 Jun 2006, at 19:03, Peter Ryser wrote: > It's a little bit more complicated than that but your statement is > basically correct. > > - Peter > > > Grant Likely wrote: > >> On 6/1/06, Peter Ryser <peter.ryser at xilinx.com> wrote: >> >>> There are some silicon issues on the PPC405 in V4 with PVR 0x20011430 >>> which are documented in Xilinx solution record 20658. All these >>> issues >>> are fixed in silicon where the PPC405 has a PVR of 0x20011470. >>> >>> Said that it's not true that the caches cannot be used in silicon >>> with >>> PVR 0x20011430. The problem is a corner case which does not show in >>> typical designs. >> >> >> If I understand correctly, the cache issue only shows up with RAM >> attached to the OPB (instead of PLB). Is that correct? >> >> Cheers, >> g. >> >> > > > > _______________________________________________ > Linuxppc-embedded mailing list > Linuxppc-embedded at ozlabs.org > https://ozlabs.org/mailman/listinfo/linuxppc-embedded
