Hey list, I'm new here so I thought I'd introduce myself a bit. I'm a grad student at the University of Colorado Boulder, and am researching novel FPGA reconfiguration techniques this summer. Our focus is on Xilinx parts and their partial reconfiguration features. Our goal is to use active reconfiguration to move functional blocks around an FPGA as needed for space-based mission survivability.
Anyway, in order to do this I first need to get a Linux envirnment up and running on my Xilinx XUP board. This board has a Virtex II Pro FPGA with dual PPC405 cores built-in. I have a basic Linux install built up using the EMPART tutorial (http://www.cs.washington.edu/research/lis/empart/xup_ppc_linux.shtml) and other pages it references. I have followed these instructions exactly, including busybox and Linux kernel versions (1.1.0 and 2.4.26, respectively) and everything looks swell EXCEPT: I can't manage to communicate with my custom IP hanging off the OPB bus. Actually, I can't manage to communicate with any peripherals at all off the OPB bus. As per the EMPART tutorial's recommendations, here's how I attempt IP access: fd = open("/dev/mem", O_RDWR); ptr = MAP_FAILED; // Initialize to bad value ptr = (int *) mmap(0, 256, PROT_READ|PROT_WRITE, MAP_SHARED, fd, USER_LOGIC_BASEADDR); if(ptr==MAP_FAILED) { printf("Err: cannot access address!\n"); return -1; } *ptr = 0xA; The mmap call appears to work, and returns a pointer to virtual memory that supposedly references the physical address my IP is located at. However, when I try to read or write to this pointer I just get a rather ambiguous "bus error". Some random things I have tried: - setting dugging for devfs - returns no unusual messages - numerous scans through kernel config params looking for some sort of MMU settings or something - setting a pointer directly to the physical address of the peripheral - yeah, right... - mapping a pointer to another established IP, in this case UART - same problem Anyone have any experience with this topic? Any suggestions at all? Do you think it has something to do w/ the MMU of the PPC405, or am I way off base here? I know this isn't an FPGA forum, but then I don't think there exists a forum which exactly meets my needs. :) Thanks much, --scott -------------- next part -------------- An HTML attachment was scrubbed... URL: http://ozlabs.org/pipermail/linuxppc-embedded/attachments/20060717/ff26fe69/attachment.htm
