In message <[EMAIL PROTECTED]> you wrote: > > The problem is that I can't seem to get any interrupts > (not ata, not bestcomm task), when setting up MWDMA/UDMA mode.
First, please check the errata. There are some issues in this area - one involves the ATA controller not handling automatic pause for DMA transfers (controller will corrupt FIFO data when there is any sig- nificant transfer load - system freezes, kernel crashes); another one is erratum 158: "ATA interrupt is not affected by FIFO errors." Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED] Conscious is when you are aware of something, and conscience is when you wish you weren't. _______________________________________________ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
