Ming, That's correct, the current driver is not interrupt driven, but simply polled. Interrupts don't really add much except overhead, unless the core can DMA as well. What architecture and core version are you running? I believe there is a DEBUG define, which will generate some logging messages. It would be helpful if you can turn this on and then look at the resulting dmesg.
There are two things to be aware of: 1) xps-hwicap1.00.a is huge.. It's much smaller to use opb-hwicap + plb46-opb bridge. I don't think an updated version has been released, however. 2) I've had problems getting the ICAP interface to properly SYNC, which may be the problem here.... based on your response, we can debug further. Steve -----Original Message----- From: MingLiu [mailto:[EMAIL PROTECTED] Sent: Wed 10/8/2008 7:47 AM To: John Linn; linuxppc-embedded@ozlabs.org Cc: Stephen Neuendorffer Subject: RE: Linux driver for Xilinx ICAP Dear John, Nice to hear from you. If possible, could you please show me your .mhs file concerning to the xps_hwicap core? Mine is listed as below: BEGIN xps_hwicap PARAMETER INSTANCE = xps_hwicap_0 PARAMETER HW_VER = 1.00.a PARAMETER C_BASEADDR = 0x40200000 PARAMETER C_HIGHADDR = 0x4020FFFF BUS_INTERFACE SPLB = plb PORT IP2INTC_Irpt = xps_hwicap_0_IP2INTC_IrptEND The interrupt signal is connected to the interrupt controller. I suspect that the driver in Linux doesn't support interrupt mode for this core, since I didn't find interrupt handler registration function in the source code, like "request_irq", etc.. I will appreciate if you can have some comments to me. Br Ming Subject: RE: Linux driver for Xilinx ICAPDate: Wed, 8 Oct 2008 08:34:28 -0600From: [EMAIL PROTECTED]: [EMAIL PROTECTED]; [EMAIL PROTECTED]: [EMAIL PROTECTED] Hi Ming, I'm copying our local expert on this core to see his thoughts as I don't actively use this core myself. Thanks, John From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of MingLiuSent: Wednesday, October 08, 2008 7:48 AMTo: [EMAIL PROTECTED]: Linux driver for Xilinx ICAP Dear all,Has someone manage to use the driver for the Xilinx xps_hwicap core to reconfigure bitstreams? I have enabled the driver in Linux configuration (version 2.6.24 from Xilinx tree). However I failed to use it to reconfigure bitstreams. The operations are listed as follows: # cp partial.bit /dev/icap0# No error information is shown, however the partial bitstream is not successfully configured. I checked /proc/devices and the device "icap" has been successfully registered with the major of 259. But in /proc/interrupts, I didn't find any matching entry of the interrupt for icap core. I tried to reconfigure the PR module with JTAG, and my design works well. Any hints for this problem? Is the problem on the interrupt? Thanks so much if someone can help me. BRMing Windows Live Writer,??????????,????????? ????!This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. _________________________________________________________________ Windows Live Photo gallery ?????????,?????????,????????! http://get.live.cn/product/photo.html This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.
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