Yo Jacob E!

On Tue, 24 Feb 2015 21:33:49 +0000
"Keller, Jacob E" <jacob.e.kel...@intel.com> wrote:

> > No, I am not.  As noted in the test procedure dump I did this first:
> >     # killall ptp4l phc2sys
> > 
> 
> This is probably the root of your problem. Nothing else *should* be
> writing the clock but any software that has privileges and access
> to /dev/ptpX could write to it..

What else *could* be writing /dev/ptpX.  I have never installed ptpd or
anything similar.

> Also your driver can do it in case of a reset.

I've not noticed any port resets.

> Could you post your dmesg log? This is an Intel part that I have some
> driver experience with so maybe I can spot any inconsistency there.

Here you go, first the debug output:


kong ~ # killall ptp4l phc2sys
ptp4l: no process found
phc2sys: no process found
kong ~ # killall ptp4l phc2sys
ptp4l: no process found
phc2sys: no process found
kong ~ # cat ptp.conf
[global]
clock_servo     linreg
uds_address     /var/run/ptp4l

kong ~ # ptp4l -i eth0 -l 7 -m -f ptp.conf &
kong ~ # sleep 3
ptp4l[48368.046]: selected /dev/ptp0 as PTP clock
ptp4l[48368.046]: port 1: INITIALIZING to LISTENING on INITIALIZE
ptp4l[48368.046]: port 0: INITIALIZING to LISTENING on INITIALIZE
ptp4l[48368.406]: port 1: setting asCapable
ptp4l[48368.406]: port 1: new foreign master 003048.fffe.345fe2-1
kong ~ # phc2sys -a -r -E ntpshm -m -M 2
ptp4l[48371.047]: port 0: setting asCapable
phc2sys[48372.047]: reconfiguring after port state change
phc2sys[48372.047]: selecting eth0 for synchronization
phc2sys[48372.047]: nothing to synchronize
ptp4l[48372.406]: selected best master clock 003048.fffe.345fe2
ptp4l[48372.406]: foreign master not using PTP timescale
ptp4l[48372.406]: port 1: LISTENING to UNCALIBRATED on RS_SLAVE
phc2sys[48373.048]: port 002590.fffe.f355da-1 changed state
phc2sys[48373.048]: reconfiguring after port state change
phc2sys[48373.048]: master clock not ready, waiting...
ptp4l[48373.473]: port 1: delay timeout
ptp4l[48373.474]: path delay         54411      54411
ptp4l[48374.419]: master offset  328777253 s0 freq   -8900 path delay     54411
ptp4l[48374.911]: port 1: delay timeout
ptp4l[48374.912]: path delay         54730      55049
ptp4l[48375.419]: master offset  328777178 s0 freq   -8900 path delay     54730
ptp4l[48375.518]: port 1: delay timeout
ptp4l[48375.519]: path delay         55049      64001
ptp4l[48376.419]: master offset  328775902 s0 freq   -8900 path delay     55049
ptp4l[48376.912]: port 1: delay timeout
ptp4l[48376.912]: path delay         55455      55862
ptp4l[48377.419]: linreg: points 4 slope 1.000009562 intercept -328775458 err 0
ptp4l[48377.419]: master offset  328775472 s1 freq   -9576 path delay     55455
ptp4l[48377.508]: port 1: delay timeout
ptp4l[48378.129]: port 1: delay timeout
ptp4l[48378.419]: linreg: points 4 slope 1.000009634 intercept 41 err 78
ptp4l[48378.419]: master offset         78 s2 freq   -9675 path delay     55455
ptp4l[48378.419]: port 1: UNCALIBRATED to SLAVE on MASTER_CLOCK_SELECTED
phc2sys[48379.049]: port 002590.fffe.f355da-1 changed state
phc2sys[48379.049]: reconfiguring after port state change
phc2sys[48379.049]: selecting CLOCK_REALTIME for synchronization
phc2sys[48379.049]: selecting eth0 as the master clock
phc2sys[48379.049]: phc offset 328806192 s0 freq      +0 delay   1516
ptp4l[48379.419]: linreg: points 4 slope 1.000009343 intercept -533 err 341
ptp4l[48379.419]: master offset        604 s2 freq   -8810 path delay     55455
phc2sys[48380.049]: phc offset 328806161 s0 freq      +0 delay   1516
ptp4l[48380.205]: port 1: delay timeout
ptp4l[48380.205]: path delay         55049      47086
ptp4l[48380.419]: linreg: points 4 slope 1.000009269 intercept -159 err 298
ptp4l[48380.419]: master offset        213 s2 freq   -9110 path delay     55049
ptp4l[48380.637]: port 1: delay timeout
ptp4l[48380.638]: path delay         54730      43799
phc2sys[48381.049]: phc offset 328806265 s0 freq      +0 delay   1517
ptp4l[48381.419]: linreg: points 4 slope 1.000009081 intercept -376 err 341
ptp4l[48381.419]: master offset        470 s2 freq   -8705 path delay     54730
phc2sys[48382.049]: phc offset 328806509 s0 freq      +0 delay   1515
ptp4l[48382.373]: port 1: delay timeout
ptp4l[48382.373]: path delay         55049      57392
ptp4l[48382.419]: linreg: points 4 slope 1.000008817 intercept -579 err 431
ptp4l[48382.419]: master offset        789 s2 freq   -8238 path delay     55049
phc2sys[48383.049]: phc offset 328807191 s0 freq      +0 delay   1517
ptp4l[48383.419]: linreg: points 4 slope 1.000008839 intercept 183 err 426
ptp4l[48383.419]: master offset       -403 s2 freq   -9023 path delay     55049
ptp4l[48383.578]: port 1: delay timeout
ptp4l[48383.578]: path delay         55455      60894
phc2sys[48384.050]: phc offset 328807550 s0 freq      +0 delay   1505
ptp4l[48384.419]: linreg: points 4 slope 1.000008954 intercept 223 err 404
ptp4l[48384.419]: master offset       -269 s2 freq   -9177 path delay     55455
phc2sys[48385.050]: phc offset 328807545 s0 freq      +0 delay   1515
ptp4l[48385.369]: port 1: delay timeout
ptp4l[48385.369]: path delay         55862      55986
ptp4l[48385.419]: linreg: points 4 slope 1.000009416 intercept 942 err 503
ptp4l[48385.419]: master offset      -1199 s2 freq  -10358 path delay     55862
ptp4l[48385.593]: port 1: delay timeout
ptp4l[48385.593]: path delay         55455      49211
ptp4l[48385.810]: port 1: delay timeout
ptp4l[48385.810]: path delay         55924      63105
phc2sys[48386.050]: phc offset 328806728 s0 freq      +0 delay   1515
ptp4l[48386.419]: linreg: points 4 slope 1.000009022 intercept -976 err 608
ptp4l[48386.419]: master offset       1452 s2 freq   -8046 path delay     55924
phc2sys[48387.050]: phc offset 328806932 s0 freq      +0 delay   1517
ptp4l[48387.174]: port 1: delay timeout
ptp4l[48387.174]: path delay         55924      45407
ptp4l[48387.419]: linreg: points 4 slope 1.000008845 intercept -336 err 587
ptp4l[48387.419]: master offset        398 s2 freq   -8509 path delay     55924
ptp4l[48387.670]: port 1: delay timeout
ptp4l[48387.671]: path delay         55924      60382
ptp4l[48387.683]: port 1: delay timeout
ptp4l[48387.684]: path delay         52608      49230
phc2sys[48388.050]: phc offset 328807681 s0 freq      +0 delay   1516
ptp4l[48388.419]: linreg: points 4 slope 1.000007825 intercept -2085 err 629
ptp4l[48388.419]: master offset       2664 s2 freq   -5740 path delay     52608
phc2sys[48389.051]: phc offset 328809985 s0 freq      +0 delay   1536
ptp4l[48389.419]: linreg: points 4 slope 1.000007838 intercept 133 err 622
ptp4l[48389.419]: master offset       -300 s2 freq   -7971 path delay     52608
ptp4l[48389.423]: port 1: delay timeout
ptp4l[48389.424]: path delay         52608      47867
phc2sys[48390.051]: phc offset 328811953 s0 freq      +0 delay   1518
ptp4l[48390.419]: linreg: points 4 slope 1.000008301 intercept 1323 err 653
ptp4l[48390.419]: master offset      -2150 s2 freq   -9623 path delay     52608
ptp4l[48390.894]: port 1: delay timeout
ptp4l[48390.894]: path delay         56592      57199
phc2sys[48391.051]: phc offset 328812074 s0 freq      +0 delay   1515
ptp4l[48391.349]: port 1: delay timeout
ptp4l[48391.349]: path delay         52608      41147
ptp4l[48391.419]: linreg: points 4 slope 1.000008882 intercept 715 err 647
ptp4l[48391.419]: master offset       -335 s2 freq   -9597 path delay     52608
phc2sys[48392.051]: phc offset 328811597 s0 freq      +0 delay   1517
ptp4l[48392.389]: port 1: delay timeout
ptp4l[48392.389]: path delay         49220      47224
ptp4l[48392.419]: linreg: points 4 slope 1.000007611 intercept -2922 err 716
ptp4l[48392.419]: master offset       4126 s2 freq   -4689 path delay     49220
ptp4l[48392.568]: port 1: delay timeout
ptp4l[48392.568]: path delay         49220      53497
phc2sys[48393.051]: phc offset 328814195 s0 freq      +0 delay   1516
ptp4l[48393.419]: linreg: points 4 slope 1.000007412 intercept 296 err 726
ptp4l[48393.419]: master offset      -1236 s2 freq   -7709 path delay     49220
phc2sys[48394.051]: phc offset 328816715 s0 freq      +0 delay   1515
ptp4l[48394.419]: linreg: points 4 slope 1.000008064 intercept 1401 err 749
ptp4l[48394.419]: master offset      -1872 s2 freq   -9465 path delay     49220
ptp4l[48394.440]: port 1: delay timeout
ptp4l[48394.440]: path delay         50829      52428
phc2sys[48395.052]: phc offset 299887769 s0 freq      +0 delay   1378
ptp4l[48395.362]: linreg: points 4 slope 1.000009908 intercept 3546 err 820
ptp4l[48395.362]: master offset      -4256 s2 freq  -13453 path delay     50829
ptp4l[48395.726]: port 1: delay timeout
ptp4l[48395.727]: path delay         50829      54273
phc2sys[48396.052]: phc offset 208967251 s0 freq      +0 delay   1379
ptp4l[48396.279]: linreg: points 4 slope 1.000009460 intercept -1172 err 839
ptp4l[48396.279]: master offset       1810 s2 freq   -8287 path delay     50829
ptp4l[48396.938]: port 1: delay timeout
ptp4l[48396.938]: path delay         52962      60679
phc2sys[48397.052]: phc offset 118050472 s0 freq      +0 delay   1470
ptp4l[48397.195]: linreg: points 4 slope 1.000009995 intercept 1144 err 853
ptp4l[48397.195]: master offset      -1520 s2 freq  -11139 path delay     52962
phc2sys[48398.052]: phc offset  27131713 s0 freq      +0 delay   1390
ptp4l[48398.112]: linreg: points 4 slope 1.000009589 intercept -618 err 846
ptp4l[48398.112]: master offset        531 s2 freq   -8971 path delay     52962
ptp4l[48398.845]: port 1: delay timeout
ptp4l[48398.845]: path delay         52962      56980
phc2sys[48399.052]: phc offset -13300220 s0 freq      +0 delay   1597
ptp4l[48399.077]: linreg: points 4 slope 1.000009968 intercept 375 err 830
ptp4l[48399.077]: master offset          9 s2 freq  -10343 path delay     52962
ptp4l[48399.714]: port 1: delay timeout
ptp4l[48399.714]: path delay         53885      55412
ptp4l[48399.931]: port 1: delay timeout
ptp4l[48399.932]: path delay         54842      63268
phc2sys[48400.052]: phc offset -13301383 s0 freq      +0 delay   1516
ptp4l[48400.077]: linreg: points 4 slope 1.000009308 intercept -1088 err 835
ptp4l[48400.077]: master offset       1070 s2 freq   -8221 path delay     54842
ptp4l[48400.405]: port 1: delay timeout
ptp4l[48400.405]: path delay         54842      58364
phc2sys[48401.052]: phc offset -13300580 s0 freq      +0 delay   1516
ptp4l[48401.077]: linreg: points 4 slope 1.000009393 intercept 145 err 821
ptp4l[48401.077]: master offset       -150 s2 freq   -9538 path delay     54842
phc2sys[48402.052]: phc offset -13301020 s0 freq      +0 delay   1515
ptp4l[48402.077]: linreg: points 4 slope 1.000009213 intercept -398 err 815
ptp4l[48402.077]: master offset        546 s2 freq   -8815 path delay     54842
ptp4l[48402.182]: port 1: delay timeout
ptp4l[48402.182]: path delay         54842      45838
ptp4l[48402.688]: port 1: delay timeout
ptp4l[48402.688]: path delay         54842      42398
phc2sys[48403.053]: phc offset -13300753 s0 freq      +0 delay   1517
ptp4l[48403.077]: linreg: points 4 slope 1.000009176 intercept -40 err 799
ptp4l[48403.077]: master offset          6 s2 freq   -9135 path delay     54842
ptp4l[48404.038]: port 1: delay timeout
ptp4l[48404.038]: path delay         54842      53071
phc2sys[48404.053]: phc offset -13300764 s0 freq      +0 delay   1504
ptp4l[48404.078]: linreg: points 4 slope 1.000009149 intercept -11 err 784
ptp4l[48404.078]: master offset        -39 s2 freq   -9138 path delay     54842
phc2sys[48405.053]: phc offset -13300747 s0 freq      +0 delay   1516
ptp4l[48405.078]: linreg: points 4 slope 1.000008982 intercept -468 err 783
ptp4l[48405.078]: master offset        753 s2 freq   -8515 path delay     54842
ptp4l[48406.038]: port 1: delay timeout
ptp4l[48406.038]: path delay         56196      57368
phc2sys[48406.053]: phc offset -13300186 s0 freq      +0 delay   1516
ptp4l[48406.078]: linreg: points 4 slope 1.000008225 intercept -1622 err 811
ptp4l[48406.078]: master offset       2160 s2 freq   -6603 path delay     56196
phc2sys[48407.053]: phc offset -13297757 s0 freq      +0 delay   1595
ptp4l[48407.078]: linreg: points 4 slope 1.000009064 intercept 2291 err 867
ptp4l[48407.078]: master offset      -3629 s2 freq  -11356 path delay     56196
ptp4l[48407.611]: port 1: delay timeout
ptp4l[48407.611]: path delay         56196      46776
phc2sys[48408.054]: phc offset -13299925 s0 freq      +0 delay   1516
ptp4l[48408.078]: linreg: points 4 slope 1.000009548 intercept 671 err 859
ptp4l[48408.078]: master offset       -469 s2 freq  -10219 path delay     56196
phc2sys[48409.054]: phc offset -13301099 s0 freq      +0 delay   1517
ptp4l[48409.078]: linreg: points 4 slope 1.000009940 intercept 417 err 843
ptp4l[48409.078]: master offset        -63 s2 freq  -10357 path delay     56196
ptp4l[48409.600]: port 1: delay timeout
ptp4l[48409.601]: path delay         54241      48536
phc2sys[48410.054]: phc offset -13318750 s0 freq      +0 delay   1582
ptp4l[48410.078]: clockcheck: clock jumped forward or running faster than 
expected!
ptp4l[48410.078]: master offset 70368744180811 s0 freq  -10357 path delay     
54241
ptp4l[48410.078]: port 1: SLAVE to UNCALIBRATED on SYNCHRONIZATION_FAULT
phc2sys[48411.054]: port 002590.fffe.f355da-1 changed state
phc2sys[48411.054]: reconfiguring after port state change
phc2sys[48411.054]: master clock not ready, waiting...
ptp4l[48411.079]: master offset 70368744183134 s0 freq  -10357 path delay     
54241
ptp4l[48412.029]: port 1: delay timeout
ptp4l[48412.029]: path delay         51368      49666
ptp4l[48412.084]: master offset 70368744187846 s0 freq  -10357 path delay     
51368
ptp4l[48413.084]: linreg: points 4 slope 1.000007855 intercept -70368744188596 
err 843
ptp4l[48413.084]: master offset 70368744187580 s2 freq +599999999 path delay    
 51368
ptp4l[48413.084]: port 1: UNCALIBRATED to SLAVE on MASTER_CLOCK_SELECTED
ptp4l[48413.596]: port 1: delay timeout
ptp4l[48413.596]: negative path delay    -131938
ptp4l[48413.596]: path_delay = (t2 - t3) * rr + (t4 - t1) - (c1 + c2 + c3)
ptp4l[48413.596]: t2 - t3 = -205239411
ptp4l[48413.597]: t4 - t1 = +512838680
ptp4l[48413.597]: rr = 2.500019631
ptp4l[48413.597]: c1          0
ptp4l[48413.597]: c2          0
ptp4l[48413.597]: c3          0
ptp4l[48413.597]: path delay         49101    -131938
phc2sys[48414.055]: port 002590.fffe.f355da-1 changed state
phc2sys[48414.055]: reconfiguring after port state change
phc2sys[48414.055]: selecting CLOCK_REALTIME for synchronization
phc2sys[48414.055]: selecting eth0 as the master clock
phc2sys[48414.055]: phc offset -70368168772102 s0 freq      +0 delay   1636
ptp4l[48414.084]: linreg: points 4 slope 0.999899345 intercept -70368144209416 
err 362185
ptp4l[48414.084]: master offset 70368144318188 s2 freq +599999999 path delay    
 49101
ptp4l[48414.136]: port 1: delay timeout
ptp4l[48414.136]: path delay         47656      46209
ptp4l[48414.520]: port 1: delay timeout
ptp4l[48414.520]: path delay         47656      76564
phc2sys[48415.055]: phc offset -70367568670828 s0 freq      +0 delay   1581
ptp4l[48415.084]: linreg: points 4 slope 0.999863205 intercept -70367544328976 
err 181586
ptp4l[48415.084]: master offset 70367544293425 s2 freq +599999999 path delay    
 47656
ptp4l[48415.845]: port 1: delay timeout
ptp4l[48415.845]: path delay         49101     118776
phc2sys[48416.055]: phc offset -70366968524314 s0 freq      +0 delay   1800
ptp4l[48416.084]: linreg: points 4 slope 0.999899195 intercept -70366944350012 
err 181776
ptp4l[48416.084]: master offset 70366944276709 s2 freq +599999999 path delay    
 49101
phc2sys[48417.056]: phc offset -70366368366638 s0 freq      +0 delay   1517
ptp4l[48417.084]: linreg: points 4 slope 1.000008752 intercept -70366344255069 
err 182101
ptp4l[48417.084]: master offset 70366344254785 s2 freq +599999999 path delay    
 49101
ptp4l[48417.430]: port 1: delay timeout
ptp4l[48417.431]: path delay         51368      60901
phc2sys[48418.056]: phc offset -70365768242951 s0 freq      +0 delay   1517
ptp4l[48418.084]: linreg: points 4 slope 1.000009541 intercept -70365744237176 
err 145995
ptp4l[48418.084]: master offset 70365744237023 s2 freq +599999999 path delay    
 51368
ptp4l[48418.137]: port 1: delay timeout
ptp4l[48418.137]: path delay         49101      41680
ptp4l[48418.421]: port 1: delay timeout
ptp4l[48418.421]: path delay         48989      49442
phc2sys[48419.056]: phc offset -70365168123872 s0 freq      +0 delay   1516
ptp4l[48419.084]: linreg: points 4 slope 1.000008598 intercept -70365144203149 
err 122176
ptp4l[48419.084]: master offset 70365144204054 s2 freq +599999999 path delay    
 48989
ptp4l[48419.996]: port 1: delay timeout
ptp4l[48419.997]: path delay         48989      37993
phc2sys[48420.056]: phc offset -70364568028650 s0 freq      +0 delay   1582
ptp4l[48420.084]: clockcheck: clock jumped forward or running faster than 
expected!
ptp4l[48420.084]: master offset 140733288370371 s0 freq +599999999 path delay   
  48989
ptp4l[48420.084]: port 1: SLAVE to UNCALIBRATED on SYNCHRONIZATION_FAULT
phc2sys[48421.056]: port 002590.fffe.f355da-1 changed state
phc2sys[48421.057]: reconfiguring after port state change
phc2sys[48421.057]: master clock not ready, waiting...
ptp4l[48421.084]: master offset 140732688350093 s0 freq +599999999 path delay   
  48989
ptp4l[48421.570]: port 1: delay timeout
ptp4l[48421.571]: path delay         49554  146073983
ptp4l[48422.084]: master offset 140732088332451 s0 freq +599999999 path delay   
  49554
ptp4l[48422.536]: port 1: delay timeout
ptp4l[48422.536]: path delay         55171  135723814
ptp4l[48423.084]: linreg: points 4 slope 1.000010546 intercept -140731488300783 
err 122176
ptp4l[48423.084]: master offset 140731488299227 s2 freq +599999999 path delay   
  55171
ptp4l[48423.084]: port 1: UNCALIBRATED to SLAVE on MASTER_CLOCK_SELECTED
ptp4l[48423.093]: port 1: delay timeout
ptp4l[48423.093]: path delay         59812      58724
ptp4l[48423.502]: port 1: delay timeout
ptp4l[48423.502]: path delay         59812      43311
phc2sys[48424.057]: port 002590.fffe.f355da-1 changed state
phc2sys[48424.057]: reconfiguring after port state change
phc2sys[48424.057]: selecting CLOCK_REALTIME for synchronization
phc2sys[48424.057]: selecting eth0 as the master clock
phc2sys[48424.057]: phc offset -140730911647787 s0 freq      +0 delay   1470
ptp4l[48424.084]: linreg: points 4 slope 1.000012236 intercept -140730888281503 
err 3818
ptp4l[48424.084]: master offset 140730888280902 s2 freq +599999999 path delay   
  59812
ptp4l[48424.685]: port 1: delay timeout
ptp4l[48424.685]: path delay         57425      56126
phc2sys[48425.057]: phc offset -140730311546892 s0 freq      +0 delay   1517
ptp4l[48425.084]: linreg: points 4 slope 1.000011115 intercept -140730288244723 
err 4804
ptp4l[48425.084]: master offset 140730288247075 s2 freq +599999999 path delay   
  57425
phc2sys[48426.058]: phc offset -140729711417875 s0 freq      +0 delay   1517
ptp4l[48426.084]: linreg: points 4 slope 1.000008793 intercept -140729688242615 
err 4790
ptp4l[48426.084]: master offset 140729688243150 s2 freq +599999999 path delay   
  57425
ptp4l[48426.602]: port 1: delay timeout
ptp4l[48426.602]: path delay         56291      56456
ptp4l[48426.602]: port 1: delay timeout
ptp4l[48426.603]: path delay         56291      64187
phc2sys[48427.058]: phc offset -140729111582627 s0 freq      +0 delay   1512
ptp4l[48427.083]: linreg: points 4 slope 1.000007751 intercept -140729088214989 
err 3828
ptp4l[48427.083]: master offset 140729088214514 s2 freq +599999999 path delay   
  56291
ptp4l[48427.768]: port 1: delay timeout
ptp4l[48427.768]: path delay         57590      63474
phc2sys[48428.058]: phc offset -140728512483869 s0 freq      +0 delay   1595
ptp4l[48428.081]: linreg: points 4 slope 1.000008704 intercept -140728488200748 
err 3433
ptp4l[48428.081]: master offset 140728488200589 s2 freq +599999999 path delay   
  57590
phc2sys[48429.058]: phc offset -140727913371351 s0 freq      +0 delay   1578
ptp4l[48429.079]: linreg: points 4 slope 1.000009008 intercept -140727888176495 
err 3016
ptp4l[48429.079]: master offset 140727888176243 s2 freq +599999999 path delay   
  57590
^Cphc2sys[48429.590]: phc offset -140727594663556 s0 freq      +0 delay   1577

Clearly bonkers now, so ^C.

Then I check dmesg, nothing there at all.  

Any way to turn on some e1000e debugging?


> > > You must not tell phc2sys to drive the system clock, then,
> > > otherwise those two programs would fight each other. This means
> > > you must not pass "-r" to phc2sys, that option tells phc2sys to
> > > drive the system clock (please do read the phc2sys man page
> > > before asking more questions about this, thanks).
> > 
> 
> I do not believe Jiri is right. I ran a similar config and it
> appeared to work fine, without crazy clock jumping. Chronyd simply
> took the SHM reference and tuned the system clock over time, because
> the ntpshm servo presents itself to the ntp daemon.

I hope so.  I'll believe it when I see it.

> > I tried removing the "-r".  When I do that the ntpshm is no longer
> > written, thus cutting ntpshm out of the loop, making this useless.
> > 
> 
> You need the "-r" because otherwise it doesn't have a clock to
> synchronize..

As you can see, I re-added the "-r" clock above.

> > Well, that conflicts with prior advice on this list.  Are you
> > saying that I have no need to run phc2sys in hardware timestamp
> > mode?  Does that mean I can run just ptp4l in ntpshm mode and
> > timestamp mode?
> > 
> 
> You must run phc2sys in hardware timestamping mode.

OK, I think that is what I'm doing.  You can see above what I am doing.

> > I have also seen ptp4l software time suddenly gain large (300 mSec)
> > offsets that persist for hours.  A program restart fixes that.
> > There is a lot of promise to this package, but a lot of work to do
> > as well.
> > 
> 
> If the remote clock jumps by 300ms, it is below the normal "jump" and
> ptp4l servo attempts to tune for this by reducing frequency which
> will take a very long time to catch up since most devices cannot
> adjust the frequency very far. This is in order to provide a smooth
> transition instead of an immediate jump.

My remote master clock has local PPS linked using chronyd, jitter around
200 nSec or better.  Sometims I run my master with two local PPS for a
sanity check.  My master chimer has a number of slaves also with local
PPS.

So not possible the master is anything but near perfect.  Perfect being
defined as better than 1 uSec.

But we can leave the 300 mSec problem aside for now. chronyd can handle
that.  It is the hardware clock going totally bonkers that is killing
me.

RGDS
GARY
---------------------------------------------------------------------------
Gary E. Miller Rellim 109 NW Wilmington Ave., Suite E, Bend, OR 97701
        g...@rellim.com  Tel:+1(541)382-8588

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