I forgot to mention that this PPS output is linked to the CPTS internal timestamping counter (ptp clock) but not to the system time. System clock is still synchronized by phc2sys with software dependent precision.
This is not a problem for us for now because we use ptp clock for time critical measurements and system clock for the rest (file i/o, etc.). However, the work is in progress to achieve better synchronization between these clocks, perhaps by connecting PPS output to some GPIO input and by using the RT kernel. 2015-08-05 18:59 GMT+03:00 Yursen Kim <kyur...@gmail.com>: > If PPS output is generated by Dual-Mode Timer, its accuracy doesn't > depend on any software latencies, so there is no need in RT patches. > However the resolution of DMTimer is limited to 26 MHz (~39 ns). > > In our device, the AM335x core is clocked by 19.2 MHz adjustable > oscillator, so the PPS output resolution is ~53 ns. In practice, > DMTimer lowers PPS readings by 20-30 ns. > > For example, under the ideal conditions (two devices are connected > directly with a single patch cord), ptp4l reports master offset to be > in the range of +- 15 ns, while the oscilloscope shows +- 30 ns. > > > 2015-08-04 10:49 GMT+03:00 Juan Solano <jsol...@yahoo.es>: > >> thanks for your suggestion, Kim. What kind of values are you getting? >> Juan. >> >> >> On Wed, Jul 29, 2015, at 07:41 PM, Yursen Kim wrote: >> >> We implemented PPS output signal through AM335x Dual-Mode Timer running in >> the PWM mode with SCLK frequency. >> >> This is more accurate than software GPIO output because the CPTS on the >> AM335x >> can generate hardware timestamp event on the rising edge of the DMTimer, >> making it possible to synchronize PPS with the CPTS internal clock >> counter. >> >> >> 2015-07-29 20:08 GMT+03:00 Chris Healy <cphe...@gmail.com>: >> >> The Freescale MX6 based Sabre boards are inexpensive and have good PTP >> support now, don't they? IIRC, recently there was some changes made to >> support the HW 1588 block in the MAC that allows the HW to drive a 1588 >> output pin correctly. >> I have not tested this myself yet though but will be doing so in the near >> future as I'm working on a design that will depend on it.... ;-) >> >> On Wed, Jul 29, 2015 at 9:17 AM, Richard Cochran < >> richardcoch...@gmail.com> wrote: >> >> On Wed, Jul 29, 2015 at 05:28:12PM +0200, Juan Solano wrote: >> > Oops! time to ditch the BBB then. I have written a PPS generator driver >> > through GPIO: >> > >> > https://github.com/jsln/pps-gen-gpio >> >> Right, so the jitter you are seeing is mostly due to latencies in the >> OS. You can improve this a bit by using a PREEMPT_RT kernel. >> >> > Do you know of a cheap SBC we can use that supports HW timestamp? Has >> > anybody had success with Atmel SAMA5D3 chips? >> >> I can't think of any cheap SBC that also has good PTP support. >> >> Sorry, >> Richard >> >> >> ------------------------------------------------------------------------------ >> _______________________________________________ >> Linuxptp-devel mailing list >> Linuxptp-devel@lists.sourceforge.net >> https://lists.sourceforge.net/lists/listinfo/linuxptp-devel >> >> >> >> >> ------------------------------------------------------------------------------ >> >> _______________________________________________ >> Linuxptp-devel mailing list >> Linuxptp-devel@lists.sourceforge.net >> https://lists.sourceforge.net/lists/listinfo/linuxptp-devel >> >> >> >> > >
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