In RegisterContextPOSIXProcessMonitor_arm64::ReadRegister this code seems to be
copied from an x86 version of this impl:
if (success)
{
// If our read was not aligned (for ah,bh,ch,dh), shift our
returned value one byte to the right.
if (is_subreg && (reg_info->byte_offset & 0x1))
value.SetUInt64(value.GetAsUInt64() >> 8);
// If our return byte size was greater than the return value reg
size, then
// use the type specified by reg_info rather than the uint64_t
default
if (value.GetByteSize() > reg_info->byte_size)
value.SetType(reg_info);
}
arm64 does have invalidate_registers like x86 -- w0 is the lower 32 bits of x0;
and s0, d0, and q0 aka v0 also are all from the same part of the register file.
But I think this is doing something very x86 specific for supporting the 8-bit
variants of eax etc registers and I don't think it is applicable..
RegisterContextPOSIXProcessMonitor_arm64::ReadRegister also only handles 2/4/8
byte registers - but the v0-31 registers are 16-bytes wide each. Maybe the
vector regs don't go through this code path. The same problem would arise for
x86 with the xmm/ymm type registers.
On Aug 27, 2014, at 2:08 PM, Paul Osmialowski <[email protected]> wrote:
> More on registering context on arm64. Depends on D4580 which although
> accepted, does not seem to be commited yet (I guess due to Host vs HostInfo
> problem).
>
> http://reviews.llvm.org/D5089
>
> Files:
> source/Plugins/Process/POSIX/CMakeLists.txt
> source/Plugins/Process/POSIX/POSIXThread.cpp
> source/Plugins/Process/POSIX/RegisterContextPOSIXProcessMonitor_arm64.cpp
> source/Plugins/Process/POSIX/RegisterContextPOSIXProcessMonitor_arm64.h
> source/Plugins/Process/Utility/CMakeLists.txt
> source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp
> source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h
> <D5089.13001.patch>_______________________________________________
> lldb-commits mailing list
> [email protected]
> http://lists.cs.uiuc.edu/mailman/listinfo/lldb-commits
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