labath added a comment.

In https://reviews.llvm.org/D24629#550841, @fjricci wrote:

> In https://reviews.llvm.org/D24629#550823, @tfiala wrote:
>
> > > > There is no reasonable thing we can base the expectation as the exact 
> > > > same device with a different cpu revision could support watchpoints 
> > > > just fine, so we could just define the list of these tests externally 
> > > > (in this case, I would probably annotate them with the watchpoint 
> > > > category and then do the skips based on categories instead).
> >
> > > 
> >
> >
> > Tangential: most chips I've worked on that had hardware watchpoint support 
> > had an instruction that could be called to find out if such a feature 
> > exists.  I think ARM does this.  I would think we could expose an API that 
> > says whether watchpoints are supported or not, and use that info in LLDB 
> > and the test suite to enable or disable them.
>
>
> I believe that PTRACE_GETHBPREGS with a value of 0 returns the hardware 
> stoppoint info on arm, and the byte representing the number of available 
> hardware watchpoints will be 0 if they aren't supported. Not sure if there's 
> a simpler way.


It's a bit trickier than that. In some cases that call will still return 
non-zero as the number of supported watchpoints, but the "watchpoint size" 
field will be zero, and it will still mean that watchpoints don't work. This is 
probably a kernel bug, though it is pretty easy to work around. The more boring 
part would be plumbing that information all the way to the test suite - Nothing 
that can't be done, it's just a bit laborious, so I haven't done that yet.


Repository:
  rL LLVM

https://reviews.llvm.org/D24629



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