https://github.com/DavidSpickett created https://github.com/llvm/llvm-project/pull/213975
This will be part of a set of RegisterSetType -> thing lookup functions later used to implement generic read and write functions. This replaces GetSVERegSet and any other direct uses of ptrace set numbers. Apart from a couple where we are trying to detect SVE and SME regardless of what the current mode is. --- <sub>Stack created with <a href="https://github.com/github/gh-stack";>GitHub Stacks CLI</a> • <a href="https://gh.io/stacks-feedback";>Give Feedback 💬</a></sub> >From 73a693ff412cf447e5be35286ae244ea88409ac8 Mon Sep 17 00:00:00 2001 From: David Spickett <[email protected]> Date: Wed, 22 Jul 2026 12:43:33 +0000 Subject: [PATCH 1/8] [lldb][AArch64][Linux] Add function to get regset dependencies This function encodes relations between sets so that you don't have to remember all the dependencies. There are some places where we do: if some condition: Invalidate(some set); I've chosen not to put that logic in this new function so that it can be a simple switch case. The few places we need extra state to make the decision are also all SVE/SME related. This code will likely remain bespoke anyway. Whereas the simple paths will all get collapsed into a generic handler later. I have kept Invalidate() variadic as there might be some situations where explicitly invalidating many things helps readers understand the code. --- .../NativeRegisterContextLinux_arm64.cpp | 29 +++++++++++++++++++ .../Linux/NativeRegisterContextLinux_arm64.h | 12 +++++++- 2 files changed, 40 insertions(+), 1 deletion(-) diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp index 82d6f8658c30b..d14426c6e586d 100644 --- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp +++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp @@ -59,6 +59,35 @@ using namespace lldb; using namespace lldb_private; using namespace lldb_private::process_linux; +NativeRegisterContextLinux_arm64::RegisterSetType +NativeRegisterContextLinux_arm64::GetInvalidationMask( + const RegisterSetType set) const { + switch (set) { + case RegisterSetType::FPMR: + case RegisterSetType::GPR: + case RegisterSetType::GCS: + case RegisterSetType::MTE: + case RegisterSetType::PAC: + case RegisterSetType::POE: + case RegisterSetType::TLS: + return set; + case RegisterSetType::SVE_HEADER: + case RegisterSetType::SVE: + case RegisterSetType::FPR: + return RegisterSetType::SVE_HEADER | RegisterSetType::SVE | + // SVE registers overlap FP registers in hardware. + RegisterSetType::FPR; + case RegisterSetType::ZA_HEADER: + case RegisterSetType::ZA: + case RegisterSetType::ZT: + // In the Linux ptrace ABI, writes that enable ZA or ZT result in + // both ZA and ZT being enabled. + return RegisterSetType::ZA_HEADER | RegisterSetType::ZA | + RegisterSetType::ZT; + llvm_unreachable("Unhandled register set"); + } +} + // A NativeRegisterContext is constructed per thread, but all threads' registers // will contain the same fields. Therefore this mutex prevents each instance // competing with the other, and subsequent instances from having to detect the diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h index 0414e5b6e612d..a9f34399f2a34 100644 --- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h +++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h @@ -123,9 +123,19 @@ class NativeRegisterContextLinux_arm64 return any(m_validity & set); } + /// Returns the mask of sets that would be invalidated if the given set was + /// invalidated. That is, the set itself and any sets that depend on it. + /// + /// If you need anything more complex such as only invalidating during certain + /// modes, put that logic in the function that calls Invalidate(). + RegisterSetType GetInvalidationMask(const RegisterSetType set) const; + + /// Invalidate our saved copies of the given register sets and any sets that + /// depend on those sets. template <typename... Ts> void Invalidate(RegisterSetType first, Ts... rest) { static_assert((std::is_same_v<Ts, RegisterSetType> && ...)); - m_validity &= ~(first | ... | rest); + m_validity &= + ~(GetInvalidationMask(first) | ... | GetInvalidationMask(rest)); } Status RestoreRegisters(void *buffer, const uint8_t **src, size_t len, >From 0578f2b2dce6c677a8016560c02ccdfc4c5b532b Mon Sep 17 00:00:00 2001 From: David Spickett <[email protected]> Date: Wed, 22 Jul 2026 14:20:38 +0000 Subject: [PATCH 2/8] convert multiple invalidates into single invalidates --- .../NativeRegisterContextLinux_arm64.cpp | 32 ++++++------------- 1 file changed, 10 insertions(+), 22 deletions(-) diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp index d14426c6e586d..453d1cfbe699d 100644 --- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp +++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp @@ -1111,7 +1111,7 @@ Status NativeRegisterContextLinux_arm64::WriteAllRegisterValues( std::bind(&NativeRegisterContextLinux_arm64::WriteAllSVE, this)); break; case RegisterSetType::FPR: { - Invalidate(RegisterSetType::SVE_HEADER, RegisterSetType::SVE); + Invalidate(RegisterSetType::SVE_HEADER); m_sve_state = SVEState::Unknown; ConfigureRegisterContext(); @@ -1161,10 +1161,7 @@ Status NativeRegisterContextLinux_arm64::WriteAllRegisterValues( src += GetFPRSize(); if (error.Success()) { - // Wrote FPU, and SVE overlaps FPU. - Invalidate(RegisterSetType::FPR, RegisterSetType::SVE_HEADER, - RegisterSetType::SVE); - + Invalidate(RegisterSetType::FPR); m_sve_state = SVEState::Unknown; ConfigureRegisterContext(); } @@ -1356,9 +1353,7 @@ Status NativeRegisterContextLinux_arm64::WriteFPR() { ioVec.iov_base = GetFPRBuffer(); ioVec.iov_len = GetFPRSize(); - // SVE Z registers overlap the FP registers. - Invalidate(RegisterSetType::FPR, RegisterSetType::SVE_HEADER, - RegisterSetType::SVE); + Invalidate(RegisterSetType::FPR); return WriteRegisterSet(&ioVec, GetFPRSize(), llvm::ELF::NT_FPREGSET); } @@ -1427,8 +1422,7 @@ Status NativeRegisterContextLinux_arm64::WriteSVEHeader() { ioVec.iov_base = GetSVEHeader(); ioVec.iov_len = GetSVEHeaderSize(); - Invalidate(RegisterSetType::FPR, RegisterSetType::SVE_HEADER, - RegisterSetType::SVE); + Invalidate(RegisterSetType::SVE_HEADER); return WriteRegisterSet(&ioVec, GetSVEHeaderSize(), GetSVERegSet()); } @@ -1462,8 +1456,7 @@ Status NativeRegisterContextLinux_arm64::WriteAllSVE() { ioVec.iov_base = GetSVEBuffer(); ioVec.iov_len = GetSVEBufferSize(); - Invalidate(RegisterSetType::FPR, RegisterSetType::SVE_HEADER, - RegisterSetType::SVE); + Invalidate(RegisterSetType::SVE); return WriteRegisterSet(&ioVec, GetSVEBufferSize(), GetSVERegSet()); } @@ -1640,9 +1633,7 @@ Status NativeRegisterContextLinux_arm64::WriteZA() { ioVec.iov_base = GetZABuffer(); ioVec.iov_len = GetZABufferSize(); - Invalidate(RegisterSetType::ZA_HEADER, RegisterSetType::ZA, - // Writing to ZA may enable ZA, which means ZT0 may change too. - RegisterSetType::ZT); + Invalidate(RegisterSetType::ZA); return WriteRegisterSet(&ioVec, GetZABufferSize(), llvm::ELF::NT_ARM_ZA); } @@ -1675,10 +1666,7 @@ Status NativeRegisterContextLinux_arm64::WriteZT() { ioVec.iov_base = GetZTBuffer(); ioVec.iov_len = GetZTBufferSize(); - Invalidate(RegisterSetType::ZT, - // Writing to an inactive ZT0 will enable ZA as well, - // which invalidates our current copy of it. - RegisterSetType::ZA_HEADER, RegisterSetType::ZA); + Invalidate(RegisterSetType::ZT); return WriteRegisterSet(&ioVec, GetZTBufferSize(), llvm::ELF::NT_ARM_ZT); } @@ -1764,7 +1752,7 @@ void NativeRegisterContextLinux_arm64::ConfigureRegisterContext() { // only the active mode will return valid register data. // Check for SME. - Invalidate(RegisterSetType::SVE_HEADER, RegisterSetType::SVE); + Invalidate(RegisterSetType::SVE_HEADER); m_sve_state = SVEState::Streaming; Status error = ReadSVEHeader(); @@ -1774,7 +1762,7 @@ void NativeRegisterContextLinux_arm64::ConfigureRegisterContext() { ((m_sve_header.flags & sve::ptrace_regs_mask) == sve::ptrace_regs_sve); // Check for SVE. - Invalidate(RegisterSetType::SVE_HEADER, RegisterSetType::SVE); + Invalidate(RegisterSetType::SVE_HEADER); m_sve_state = SVEState::Full; error = ReadSVEHeader(); @@ -1803,7 +1791,7 @@ void NativeRegisterContextLinux_arm64::ConfigureRegisterContext() { if (m_sve_state == SVEState::Full || m_sve_state == SVEState::FPSIMD || m_sve_state == SVEState::Streaming || m_sve_state == SVEState::StreamingFPSIMD) { - Invalidate(RegisterSetType::SVE_HEADER, RegisterSetType::SVE); + Invalidate(RegisterSetType::SVE_HEADER); error = ReadSVEHeader(); // On every stop we configure SVE vector length by calling >From 7d40243815f5a8009da70cc13fcb3d253a655f92 Mon Sep 17 00:00:00 2001 From: David Spickett <[email protected]> Date: Tue, 28 Jul 2026 11:50:47 +0000 Subject: [PATCH 3/8] missing default --- .../Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp index 453d1cfbe699d..4d317bd794079 100644 --- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp +++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp @@ -84,7 +84,8 @@ NativeRegisterContextLinux_arm64::GetInvalidationMask( // both ZA and ZT being enabled. return RegisterSetType::ZA_HEADER | RegisterSetType::ZA | RegisterSetType::ZT; - llvm_unreachable("Unhandled register set"); + default: + llvm_unreachable("Unhandled register set"); } } >From 47f10321bb8683fd7d8a652d706d2ebb1dc825f3 Mon Sep 17 00:00:00 2001 From: David Spickett <[email protected]> Date: Tue, 28 Jul 2026 14:01:19 +0000 Subject: [PATCH 4/8] will be caught by compiler anyway --- .../Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp | 2 -- 1 file changed, 2 deletions(-) diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp index 4d317bd794079..6d732bbfe1315 100644 --- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp +++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp @@ -84,8 +84,6 @@ NativeRegisterContextLinux_arm64::GetInvalidationMask( // both ZA and ZT being enabled. return RegisterSetType::ZA_HEADER | RegisterSetType::ZA | RegisterSetType::ZT; - default: - llvm_unreachable("Unhandled register set"); } } >From 3c867adaf1052b21e902470b425931ecc03555d7 Mon Sep 17 00:00:00 2001 From: David Spickett <[email protected]> Date: Tue, 4 Aug 2026 13:35:52 +0000 Subject: [PATCH 5/8] [lldb][AArch64][Linux] Add function to lookup ptrace set number This will be part of a set of RegisterSetType -> thing lookup functions later used to implement generic read and write functions. This replaces GetSVERegSet and any other direct uses of ptrace set numbers. Apart from a couple where we are trying to detect SVE and SME regardless of what the current mode is. --- .../NativeRegisterContextLinux_arm64.cpp | 36 +++++++++++++++++++ .../Linux/NativeRegisterContextLinux_arm64.h | 3 ++ 2 files changed, 39 insertions(+) diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp index 6d732bbfe1315..6f24352d17219 100644 --- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp +++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp @@ -87,6 +87,42 @@ NativeRegisterContextLinux_arm64::GetInvalidationMask( } } +unsigned int NativeRegisterContextLinux_arm64::GetPtraceSet( + NativeRegisterContextLinux_arm64::RegisterSetType set) const { + switch (set) { + case RegisterSetType::GPR: + return llvm::ELF::NT_PRSTATUS; + case RegisterSetType::FPR: + return llvm::ELF::NT_FPREGSET; + case RegisterSetType::SVE: + case RegisterSetType::SVE_HEADER: + switch (m_sve_state) { + case SVEState::Streaming: + case SVEState::StreamingFPSIMD: + return llvm::ELF::NT_ARM_SSVE; + default: + return llvm::ELF::NT_ARM_SVE; + } + case RegisterSetType::PAC: + return llvm::ELF::NT_ARM_PAC_MASK; + case RegisterSetType::MTE: + return llvm::ELF::NT_ARM_TAGGED_ADDR_CTRL; + case RegisterSetType::TLS: + return llvm::ELF::NT_ARM_TLS; + case RegisterSetType::ZA: + case RegisterSetType::ZA_HEADER: + return llvm::ELF::NT_ARM_ZA; + case RegisterSetType::ZT: + return llvm::ELF::NT_ARM_ZT; + case RegisterSetType::FPMR: + return llvm::ELF::NT_ARM_FPMR; + case RegisterSetType::GCS: + return llvm::ELF::NT_ARM_GCS; + case RegisterSetType::POE: + return llvm::ELF::NT_ARM_POE; + } +} + // A NativeRegisterContext is constructed per thread, but all threads' registers // will contain the same fields. Therefore this mutex prevents each instance // competing with the other, and subsequent instances from having to detect the diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h index a9f34399f2a34..1db2ac91af253 100644 --- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h +++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h @@ -117,6 +117,9 @@ class NativeRegisterContextLinux_arm64 RegisterSetType m_validity = static_cast<RegisterSetType>(0); + // Returns the ptrace register set number for the given register set. + unsigned int GetPtraceSet(RegisterSetType set) const; + void MakeValid(RegisterSetType set) { m_validity |= set; } [[nodiscard]] bool IsValid(RegisterSetType set) const { >From 6b23a57e1fac856e19eef079cef83ef5afda8541 Mon Sep 17 00:00:00 2001 From: David Spickett <[email protected]> Date: Tue, 4 Aug 2026 13:38:55 +0000 Subject: [PATCH 6/8] remove GetSVERegSet --- .../NativeRegisterContextLinux_arm64.cpp | 22 +++++++------------ .../Linux/NativeRegisterContextLinux_arm64.h | 2 -- 2 files changed, 8 insertions(+), 16 deletions(-) diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp index 6f24352d17219..6b34410fcdc18 100644 --- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp +++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp @@ -1400,16 +1400,6 @@ void NativeRegisterContextLinux_arm64::InvalidateAllRegisters() { ConfigureRegisterContext(); } -unsigned NativeRegisterContextLinux_arm64::GetSVERegSet() { - switch (m_sve_state) { - case SVEState::Streaming: - case SVEState::StreamingFPSIMD: - return llvm::ELF::NT_ARM_SSVE; - default: - return llvm::ELF::NT_ARM_SVE; - } -} - Status NativeRegisterContextLinux_arm64::ReadSVEHeader() { Status error; @@ -1420,7 +1410,8 @@ Status NativeRegisterContextLinux_arm64::ReadSVEHeader() { ioVec.iov_base = GetSVEHeader(); ioVec.iov_len = GetSVEHeaderSize(); - error = ReadRegisterSet(&ioVec, GetSVEHeaderSize(), GetSVERegSet()); + error = ReadRegisterSet(&ioVec, GetSVEHeaderSize(), + GetPtraceSet(RegisterSetType::SVE)); if (error.Success()) MakeValid(RegisterSetType::SVE_HEADER); @@ -1459,7 +1450,8 @@ Status NativeRegisterContextLinux_arm64::WriteSVEHeader() { Invalidate(RegisterSetType::SVE_HEADER); - return WriteRegisterSet(&ioVec, GetSVEHeaderSize(), GetSVERegSet()); + return WriteRegisterSet(&ioVec, GetSVEHeaderSize(), + GetPtraceSet(RegisterSetType::SVE)); } Status NativeRegisterContextLinux_arm64::ReadAllSVE() { @@ -1471,7 +1463,8 @@ Status NativeRegisterContextLinux_arm64::ReadAllSVE() { ioVec.iov_base = GetSVEBuffer(); ioVec.iov_len = GetSVEBufferSize(); - error = ReadRegisterSet(&ioVec, GetSVEBufferSize(), GetSVERegSet()); + error = ReadRegisterSet(&ioVec, GetSVEBufferSize(), + GetPtraceSet(RegisterSetType::SVE)); if (error.Success()) MakeValid(RegisterSetType::SVE); @@ -1493,7 +1486,8 @@ Status NativeRegisterContextLinux_arm64::WriteAllSVE() { Invalidate(RegisterSetType::SVE); - return WriteRegisterSet(&ioVec, GetSVEBufferSize(), GetSVERegSet()); + return WriteRegisterSet(&ioVec, GetSVEBufferSize(), + GetPtraceSet(RegisterSetType::SVE)); } Status NativeRegisterContextLinux_arm64::ReadSMEControl() { diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h index 1db2ac91af253..8e6b2d793bf6f 100644 --- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h +++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h @@ -278,8 +278,6 @@ class NativeRegisterContextLinux_arm64 size_t GetSVEBufferSize() { return m_sve_ptrace_payload.size(); } - unsigned GetSVERegSet(); - void *GetZABuffer() { return m_za_ptrace_payload.data(); }; size_t GetZABufferSize() { return m_za_ptrace_payload.size(); } >From 1b06e1058c47bf922446a41938fe0fb8405d331b Mon Sep 17 00:00:00 2001 From: David Spickett <[email protected]> Date: Tue, 4 Aug 2026 13:48:40 +0000 Subject: [PATCH 7/8] convert uses of constants --- .../NativeRegisterContextLinux_arm64.cpp | 58 ++++++++++++------- 1 file changed, 38 insertions(+), 20 deletions(-) diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp index 6b34410fcdc18..7193543c9ee9c 100644 --- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp +++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp @@ -1340,7 +1340,8 @@ Status NativeRegisterContextLinux_arm64::ReadGPR() { ioVec.iov_base = GetGPRBuffer(); ioVec.iov_len = GetGPRBufferSize(); - error = ReadRegisterSet(&ioVec, GetGPRBufferSize(), llvm::ELF::NT_PRSTATUS); + error = ReadRegisterSet(&ioVec, GetGPRBufferSize(), + GetPtraceSet(RegisterSetType::GPR)); if (error.Success()) MakeValid(RegisterSetType::GPR); @@ -1359,7 +1360,8 @@ Status NativeRegisterContextLinux_arm64::WriteGPR() { Invalidate(RegisterSetType::GPR); - return WriteRegisterSet(&ioVec, GetGPRBufferSize(), llvm::ELF::NT_PRSTATUS); + return WriteRegisterSet(&ioVec, GetGPRBufferSize(), + GetPtraceSet(RegisterSetType::GPR)); } Status NativeRegisterContextLinux_arm64::ReadFPR() { @@ -1372,7 +1374,8 @@ Status NativeRegisterContextLinux_arm64::ReadFPR() { ioVec.iov_base = GetFPRBuffer(); ioVec.iov_len = GetFPRSize(); - error = ReadRegisterSet(&ioVec, GetFPRSize(), llvm::ELF::NT_FPREGSET); + error = + ReadRegisterSet(&ioVec, GetFPRSize(), GetPtraceSet(RegisterSetType::FPR)); if (error.Success()) MakeValid(RegisterSetType::FPR); @@ -1390,7 +1393,8 @@ Status NativeRegisterContextLinux_arm64::WriteFPR() { Invalidate(RegisterSetType::FPR); - return WriteRegisterSet(&ioVec, GetFPRSize(), llvm::ELF::NT_FPREGSET); + return WriteRegisterSet(&ioVec, GetFPRSize(), + GetPtraceSet(RegisterSetType::FPR)); } void NativeRegisterContextLinux_arm64::InvalidateAllRegisters() { @@ -1429,7 +1433,8 @@ Status NativeRegisterContextLinux_arm64::ReadPAuthMask() { ioVec.iov_base = GetPACMask(); ioVec.iov_len = GetPACMaskSize(); - error = ReadRegisterSet(&ioVec, GetPACMaskSize(), llvm::ELF::NT_ARM_PAC_MASK); + error = ReadRegisterSet(&ioVec, GetPACMaskSize(), + GetPtraceSet(RegisterSetType::PAC)); if (error.Success()) MakeValid(RegisterSetType::PAC); @@ -1519,7 +1524,7 @@ Status NativeRegisterContextLinux_arm64::ReadMTEControl() { ioVec.iov_len = GetMTEControlSize(); error = ReadRegisterSet(&ioVec, GetMTEControlSize(), - llvm::ELF::NT_ARM_TAGGED_ADDR_CTRL); + GetPtraceSet(RegisterSetType::MTE)); if (error.Success()) MakeValid(RegisterSetType::MTE); @@ -1541,7 +1546,7 @@ Status NativeRegisterContextLinux_arm64::WriteMTEControl() { Invalidate(RegisterSetType::MTE); return WriteRegisterSet(&ioVec, GetMTEControlSize(), - llvm::ELF::NT_ARM_TAGGED_ADDR_CTRL); + GetPtraceSet(RegisterSetType::MTE)); } Status NativeRegisterContextLinux_arm64::ReadTLS() { @@ -1554,7 +1559,8 @@ Status NativeRegisterContextLinux_arm64::ReadTLS() { ioVec.iov_base = GetTLSBuffer(); ioVec.iov_len = GetTLSBufferSize(); - error = ReadRegisterSet(&ioVec, GetTLSBufferSize(), llvm::ELF::NT_ARM_TLS); + error = ReadRegisterSet(&ioVec, GetTLSBufferSize(), + GetPtraceSet(RegisterSetType::TLS)); if (error.Success()) MakeValid(RegisterSetType::TLS); @@ -1575,7 +1581,8 @@ Status NativeRegisterContextLinux_arm64::WriteTLS() { Invalidate(RegisterSetType::TLS); - return WriteRegisterSet(&ioVec, GetTLSBufferSize(), llvm::ELF::NT_ARM_TLS); + return WriteRegisterSet(&ioVec, GetTLSBufferSize(), + GetPtraceSet(RegisterSetType::TLS)); } Status NativeRegisterContextLinux_arm64::ReadGCS() { @@ -1588,7 +1595,8 @@ Status NativeRegisterContextLinux_arm64::ReadGCS() { ioVec.iov_base = GetGCSBuffer(); ioVec.iov_len = GetGCSBufferSize(); - error = ReadRegisterSet(&ioVec, GetGCSBufferSize(), llvm::ELF::NT_ARM_GCS); + error = ReadRegisterSet(&ioVec, GetGCSBufferSize(), + GetPtraceSet(RegisterSetType::GCS)); if (error.Success()) MakeValid(RegisterSetType::GCS); @@ -1609,7 +1617,8 @@ Status NativeRegisterContextLinux_arm64::WriteGCS() { Invalidate(RegisterSetType::GCS); - return WriteRegisterSet(&ioVec, GetGCSBufferSize(), llvm::ELF::NT_ARM_GCS); + return WriteRegisterSet(&ioVec, GetGCSBufferSize(), + GetPtraceSet(RegisterSetType::GCS)); } Status NativeRegisterContextLinux_arm64::ReadZAHeader() { @@ -1622,7 +1631,8 @@ Status NativeRegisterContextLinux_arm64::ReadZAHeader() { ioVec.iov_base = GetZAHeader(); ioVec.iov_len = GetZAHeaderSize(); - error = ReadRegisterSet(&ioVec, GetZAHeaderSize(), llvm::ELF::NT_ARM_ZA); + error = ReadRegisterSet(&ioVec, GetZAHeaderSize(), + GetPtraceSet(RegisterSetType::ZA)); if (error.Success()) MakeValid(RegisterSetType::ZA_HEADER); @@ -1640,7 +1650,8 @@ Status NativeRegisterContextLinux_arm64::ReadZA() { ioVec.iov_base = GetZABuffer(); ioVec.iov_len = GetZABufferSize(); - error = ReadRegisterSet(&ioVec, GetZABufferSize(), llvm::ELF::NT_ARM_ZA); + error = ReadRegisterSet(&ioVec, GetZABufferSize(), + GetPtraceSet(RegisterSetType::ZA)); if (error.Success()) MakeValid(RegisterSetType::ZA); @@ -1664,7 +1675,8 @@ Status NativeRegisterContextLinux_arm64::WriteZA() { Invalidate(RegisterSetType::ZA); - return WriteRegisterSet(&ioVec, GetZABufferSize(), llvm::ELF::NT_ARM_ZA); + return WriteRegisterSet(&ioVec, GetZABufferSize(), + GetPtraceSet(RegisterSetType::ZA)); } Status NativeRegisterContextLinux_arm64::ReadZT() { @@ -1677,7 +1689,8 @@ Status NativeRegisterContextLinux_arm64::ReadZT() { ioVec.iov_base = GetZTBuffer(); ioVec.iov_len = GetZTBufferSize(); - error = ReadRegisterSet(&ioVec, GetZTBufferSize(), llvm::ELF::NT_ARM_ZT); + error = ReadRegisterSet(&ioVec, GetZTBufferSize(), + GetPtraceSet(RegisterSetType::ZT)); if (error.Success()) MakeValid(RegisterSetType::ZT); @@ -1697,7 +1710,8 @@ Status NativeRegisterContextLinux_arm64::WriteZT() { Invalidate(RegisterSetType::ZT); - return WriteRegisterSet(&ioVec, GetZTBufferSize(), llvm::ELF::NT_ARM_ZT); + return WriteRegisterSet(&ioVec, GetZTBufferSize(), + GetPtraceSet(RegisterSetType::ZT)); } Status NativeRegisterContextLinux_arm64::ReadFPMR() { @@ -1710,7 +1724,8 @@ Status NativeRegisterContextLinux_arm64::ReadFPMR() { ioVec.iov_base = GetFPMRBuffer(); ioVec.iov_len = GetFPMRBufferSize(); - error = ReadRegisterSet(&ioVec, GetFPMRBufferSize(), llvm::ELF::NT_ARM_FPMR); + error = ReadRegisterSet(&ioVec, GetFPMRBufferSize(), + GetPtraceSet(RegisterSetType::FPMR)); if (error.Success()) MakeValid(RegisterSetType::FPMR); @@ -1731,7 +1746,8 @@ Status NativeRegisterContextLinux_arm64::WriteFPMR() { Invalidate(RegisterSetType::FPMR); - return WriteRegisterSet(&ioVec, GetFPMRBufferSize(), llvm::ELF::NT_ARM_FPMR); + return WriteRegisterSet(&ioVec, GetFPMRBufferSize(), + GetPtraceSet(RegisterSetType::FPMR)); } Status NativeRegisterContextLinux_arm64::ReadPOE() { @@ -1744,7 +1760,8 @@ Status NativeRegisterContextLinux_arm64::ReadPOE() { ioVec.iov_base = GetPOEBuffer(); ioVec.iov_len = GetPOEBufferSize(); - error = ReadRegisterSet(&ioVec, GetPOEBufferSize(), llvm::ELF::NT_ARM_POE); + error = ReadRegisterSet(&ioVec, GetPOEBufferSize(), + GetPtraceSet(RegisterSetType::POE)); if (error.Success()) MakeValid(RegisterSetType::POE); @@ -1765,7 +1782,8 @@ Status NativeRegisterContextLinux_arm64::WritePOE() { Invalidate(RegisterSetType::POE); - return WriteRegisterSet(&ioVec, GetPOEBufferSize(), llvm::ELF::NT_ARM_POE); + return WriteRegisterSet(&ioVec, GetPOEBufferSize(), + GetPtraceSet(RegisterSetType::POE)); } void NativeRegisterContextLinux_arm64::ConfigureRegisterContext() { >From 7b5c62898a11a1b45b910970909e5c57ad4c0eee Mon Sep 17 00:00:00 2001 From: David Spickett <[email protected]> Date: Tue, 4 Aug 2026 14:05:12 +0000 Subject: [PATCH 8/8] SVE -> SVE_HEADER --- .../Process/Linux/NativeRegisterContextLinux_arm64.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp index 7193543c9ee9c..b6a220e8c19f2 100644 --- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp +++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp @@ -1415,7 +1415,7 @@ Status NativeRegisterContextLinux_arm64::ReadSVEHeader() { ioVec.iov_len = GetSVEHeaderSize(); error = ReadRegisterSet(&ioVec, GetSVEHeaderSize(), - GetPtraceSet(RegisterSetType::SVE)); + GetPtraceSet(RegisterSetType::SVE_HEADER)); if (error.Success()) MakeValid(RegisterSetType::SVE_HEADER); @@ -1456,7 +1456,7 @@ Status NativeRegisterContextLinux_arm64::WriteSVEHeader() { Invalidate(RegisterSetType::SVE_HEADER); return WriteRegisterSet(&ioVec, GetSVEHeaderSize(), - GetPtraceSet(RegisterSetType::SVE)); + GetPtraceSet(RegisterSetType::SVE_HEADER)); } Status NativeRegisterContextLinux_arm64::ReadAllSVE() { _______________________________________________ lldb-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
