================
@@ -760,6 +772,61 @@ def test_riscv64_regs(self):
self.expect("register read --all")
+ @skipIfLLVMTargetMissing("RISCV")
----------------
DavidSpickett wrote:
As an example of what I mean about future extensions being "too weird" -
In the new Arm extension support I'm doing right now, I wrote a program file
that can be used for live processes, and to generate a core file. This keeps
all tests for that extension in one place. This helps because I have to use
weird assembly to trigger these things, and I only have to write that once. And
I don't have to put that in the standard corefile tests with some #ifdefs which
get confusing.
With floating point, you can write normal C code to set values, which can be
included easily in a program file that's quite generic.
https://github.com/llvm/llvm-project/pull/104547
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