nhaehnle wrote: How about this comment from earlier:
> Every Inst may potentially appear with many UseInsts in the temporal > divergence list. The current code will create multiple new registers and > multiple COPY instructions, which seems wasteful even if downstream passes > can often clean it up. > > I would suggest capturing the created register in a DenseMap<Instruction *, > Register> for re-use. > > Also, how about inserting the COPY at the end of Inst->getParent()? That way, > the live range of the VGPR is reduced. ? https://github.com/llvm/llvm-project/pull/124298 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
