================ @@ -1200,34 +1225,78 @@ bool AMDGPUCallLowering::lowerTailCall( if (!IsSibCall) CallSeqStart = MIRBuilder.buildInstr(AMDGPU::ADJCALLSTACKUP); - unsigned Opc = - getCallOpcode(MF, Info.Callee.isReg(), true, ST.isWave32(), CalleeCC); + bool IsChainCall = AMDGPU::isChainCC(Info.CallConv); + bool IsDynamicVGPRChainCall = false; + + if (IsChainCall) { + ArgInfo FlagsArg = Info.OrigArgs[ChainCallArgIdx::Flags]; + const APInt &FlagsValue = cast<ConstantInt>(FlagsArg.OrigValue)->getValue(); + if (FlagsValue.isZero()) { + if (Info.OrigArgs.size() != 5) { + LLVM_DEBUG(dbgs() << "No additional args allowed if flags == 0"); ---------------- arsenm wrote:
```suggestion LLVM_DEBUG(dbgs() << "No additional args allowed if flags == 0\n"); ``` https://github.com/llvm/llvm-project/pull/130094 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits