[llvm-branch-commits] [llvm] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)

via llvm-branch-commits Wed, 16 Apr 2025 21:09:17 -0700

https://github.com/koachan updated 
https://github.com/llvm/llvm-project/pull/135715


>From 6e865810ea2acaf636a4759fd4ffc67aa3dbb848 Mon Sep 17 00:00:00 2001
From: Koakuma <koac...@protonmail.com>
Date: Thu, 17 Apr 2025 08:24:54 +0700
Subject: [PATCH] Promote i32 CTLZ when we don't have VIS3 or POPC

Created using spr 1.3.5
---
 llvm/lib/Target/Sparc/SparcISelLowering.cpp |  11 +-
 llvm/test/CodeGen/SPARC/ctlz.ll             | 182 +++-----------------
 2 files changed, 35 insertions(+), 158 deletions(-)

diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp 
b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
index fa544916aebb5..e455706b0528f 100644
--- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp
+++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
@@ -1755,7 +1755,7 @@ SparcTargetLowering::SparcTargetLowering(const 
TargetMachine &TM,
                        Subtarget->usePopc() ? Legal : Expand);
     setOperationAction(ISD::CTTZ , MVT::i64, Expand);
     setOperationAction(ISD::CTLZ, MVT::i64,
-                       Subtarget->isVIS3() ? Legal : LibCall);
+                       Subtarget->isVIS3() ? Legal : Expand);
     setOperationAction(ISD::BSWAP, MVT::i64, Expand);
     setOperationAction(ISD::ROTL , MVT::i64, Expand);
     setOperationAction(ISD::ROTR , MVT::i64, Expand);
@@ -1818,7 +1818,7 @@ SparcTargetLowering::SparcTargetLowering(const 
TargetMachine &TM,
   setOperationAction(ISD::FMA  , MVT::f32, Expand);
   setOperationAction(ISD::CTTZ , MVT::i32, Expand);
   setOperationAction(ISD::CTLZ, MVT::i32,
-                     Subtarget->isVIS3() ? Promote : LibCall);
+                     Subtarget->isVIS3() ? Promote : Expand);
   setOperationAction(ISD::ROTL , MVT::i32, Expand);
   setOperationAction(ISD::ROTR , MVT::i32, Expand);
   setOperationAction(ISD::BSWAP, MVT::i32, Expand);
@@ -1992,6 +1992,13 @@ SparcTargetLowering::SparcTargetLowering(const 
TargetMachine &TM,
   if (Subtarget->isVIS3()) {
     setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Promote);
     setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Legal);
+  } else if (Subtarget->usePopc()) {
+    setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Expand);
+    setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Expand);
+  } else {
+    setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32,
+                       Subtarget->is64Bit() ? Promote : LibCall);
+    setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, LibCall);
   }
 
   setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
diff --git a/llvm/test/CodeGen/SPARC/ctlz.ll b/llvm/test/CodeGen/SPARC/ctlz.ll
index d17b776ca0a72..3391af02e4bc0 100644
--- a/llvm/test/CodeGen/SPARC/ctlz.ll
+++ b/llvm/test/CodeGen/SPARC/ctlz.ll
@@ -6,46 +6,18 @@
 define i32 @i32_nopoison(i32 %x) nounwind {
 ; V9-LABEL: i32_nopoison:
 ; V9:       ! %bb.0:
-; V9-NEXT:    cmp %o0, 0
+; V9-NEXT:    save %sp, -176, %sp
+; V9-NEXT:    cmp %i0, 0
 ; V9-NEXT:    be %icc, .LBB0_2
 ; V9-NEXT:    nop
 ; V9-NEXT:  ! %bb.1: ! %cond.false
-; V9-NEXT:    srl %o0, 1, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    srl %o0, 2, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    srl %o0, 4, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    srl %o0, 8, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    srl %o0, 16, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    xor %o0, -1, %o0
-; V9-NEXT:    srl %o0, 1, %o1
-; V9-NEXT:    sethi 1398101, %o2
-; V9-NEXT:    or %o2, 341, %o2
-; V9-NEXT:    and %o1, %o2, %o1
-; V9-NEXT:    sub %o0, %o1, %o0
-; V9-NEXT:    sethi 838860, %o1
-; V9-NEXT:    or %o1, 819, %o1
-; V9-NEXT:    and %o0, %o1, %o2
-; V9-NEXT:    srl %o0, 2, %o0
-; V9-NEXT:    and %o0, %o1, %o0
-; V9-NEXT:    add %o2, %o0, %o0
-; V9-NEXT:    srl %o0, 4, %o1
-; V9-NEXT:    add %o0, %o1, %o0
-; V9-NEXT:    sethi 246723, %o1
-; V9-NEXT:    or %o1, 783, %o1
-; V9-NEXT:    and %o0, %o1, %o0
-; V9-NEXT:    sll %o0, 8, %o1
-; V9-NEXT:    add %o0, %o1, %o0
-; V9-NEXT:    sll %o0, 16, %o1
-; V9-NEXT:    add %o0, %o1, %o0
-; V9-NEXT:    retl
-; V9-NEXT:    srl %o0, 24, %o0
+; V9-NEXT:    call __clzdi2
+; V9-NEXT:    sllx %i0, 32, %o0
+; V9-NEXT:    ret
+; V9-NEXT:    restore %g0, %o0, %o0
 ; V9-NEXT:  .LBB0_2:
-; V9-NEXT:    retl
-; V9-NEXT:    mov 32, %o0
+; V9-NEXT:    ret
+; V9-NEXT:    restore %g0, 32, %o0
 ;
 ; POPC-LABEL: i32_nopoison:
 ; POPC:       ! %bb.0:
@@ -90,39 +62,11 @@ define i32 @i32_nopoison(i32 %x) nounwind {
 define i32 @i32_poison(i32 %x) nounwind {
 ; V9-LABEL: i32_poison:
 ; V9:       ! %bb.0:
-; V9-NEXT:    srl %o0, 1, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    srl %o0, 2, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    srl %o0, 4, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    srl %o0, 8, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    srl %o0, 16, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    xor %o0, -1, %o0
-; V9-NEXT:    srl %o0, 1, %o1
-; V9-NEXT:    sethi 1398101, %o2
-; V9-NEXT:    or %o2, 341, %o2
-; V9-NEXT:    and %o1, %o2, %o1
-; V9-NEXT:    sub %o0, %o1, %o0
-; V9-NEXT:    sethi 838860, %o1
-; V9-NEXT:    or %o1, 819, %o1
-; V9-NEXT:    and %o0, %o1, %o2
-; V9-NEXT:    srl %o0, 2, %o0
-; V9-NEXT:    and %o0, %o1, %o0
-; V9-NEXT:    add %o2, %o0, %o0
-; V9-NEXT:    srl %o0, 4, %o1
-; V9-NEXT:    add %o0, %o1, %o0
-; V9-NEXT:    sethi 246723, %o1
-; V9-NEXT:    or %o1, 783, %o1
-; V9-NEXT:    and %o0, %o1, %o0
-; V9-NEXT:    sll %o0, 8, %o1
-; V9-NEXT:    add %o0, %o1, %o0
-; V9-NEXT:    sll %o0, 16, %o1
-; V9-NEXT:    add %o0, %o1, %o0
-; V9-NEXT:    retl
-; V9-NEXT:    srl %o0, 24, %o0
+; V9-NEXT:    save %sp, -176, %sp
+; V9-NEXT:    call __clzdi2
+; V9-NEXT:    sllx %i0, 32, %o0
+; V9-NEXT:    ret
+; V9-NEXT:    restore %g0, %o0, %o0
 ;
 ; POPC-LABEL: i32_poison:
 ; POPC:       ! %bb.0:
@@ -153,54 +97,17 @@ define i32 @i32_poison(i32 %x) nounwind {
 define i64 @i64_nopoison(i64 %x) nounwind {
 ; V9-LABEL: i64_nopoison:
 ; V9:       ! %bb.0:
-; V9-NEXT:    brz %o0, .LBB2_2
+; V9-NEXT:    save %sp, -176, %sp
+; V9-NEXT:    brz %i0, .LBB2_2
 ; V9-NEXT:    nop
 ; V9-NEXT:  ! %bb.1: ! %cond.false
-; V9-NEXT:    srlx %o0, 1, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    srlx %o0, 2, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    srlx %o0, 4, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    srlx %o0, 8, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    srlx %o0, 16, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    srlx %o0, 32, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    xor %o0, -1, %o0
-; V9-NEXT:    srlx %o0, 1, %o1
-; V9-NEXT:    sethi 1398101, %o2
-; V9-NEXT:    or %o2, 341, %o2
-; V9-NEXT:    sllx %o2, 32, %o3
-; V9-NEXT:    or %o3, %o2, %o2
-; V9-NEXT:    and %o1, %o2, %o1
-; V9-NEXT:    sub %o0, %o1, %o0
-; V9-NEXT:    sethi 838860, %o1
-; V9-NEXT:    or %o1, 819, %o1
-; V9-NEXT:    sllx %o1, 32, %o2
-; V9-NEXT:    or %o2, %o1, %o1
-; V9-NEXT:    and %o0, %o1, %o2
-; V9-NEXT:    srlx %o0, 2, %o0
-; V9-NEXT:    and %o0, %o1, %o0
-; V9-NEXT:    add %o2, %o0, %o0
-; V9-NEXT:    srlx %o0, 4, %o1
-; V9-NEXT:    add %o0, %o1, %o0
-; V9-NEXT:    sethi 246723, %o1
-; V9-NEXT:    or %o1, 783, %o1
-; V9-NEXT:    sllx %o1, 32, %o2
-; V9-NEXT:    or %o2, %o1, %o1
-; V9-NEXT:    and %o0, %o1, %o0
-; V9-NEXT:    sethi 16448, %o1
-; V9-NEXT:    or %o1, 257, %o1
-; V9-NEXT:    sllx %o1, 32, %o2
-; V9-NEXT:    or %o2, %o1, %o1
-; V9-NEXT:    mulx %o0, %o1, %o0
-; V9-NEXT:    retl
-; V9-NEXT:    srlx %o0, 56, %o0
+; V9-NEXT:    call __clzdi2
+; V9-NEXT:    mov %i0, %o0
+; V9-NEXT:    ret
+; V9-NEXT:    restore %g0, %o0, %o0
 ; V9-NEXT:  .LBB2_2:
-; V9-NEXT:    retl
-; V9-NEXT:    mov 64, %o0
+; V9-NEXT:    ret
+; V9-NEXT:    restore %g0, 64, %o0
 ;
 ; POPC-LABEL: i64_nopoison:
 ; POPC:       ! %bb.0:
@@ -243,48 +150,11 @@ define i64 @i64_nopoison(i64 %x) nounwind {
 define i64 @i64_poison(i64 %x) nounwind {
 ; V9-LABEL: i64_poison:
 ; V9:       ! %bb.0:
-; V9-NEXT:    srlx %o0, 1, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    srlx %o0, 2, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    srlx %o0, 4, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    srlx %o0, 8, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    srlx %o0, 16, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    srlx %o0, 32, %o1
-; V9-NEXT:    or %o0, %o1, %o0
-; V9-NEXT:    xor %o0, -1, %o0
-; V9-NEXT:    srlx %o0, 1, %o1
-; V9-NEXT:    sethi 1398101, %o2
-; V9-NEXT:    or %o2, 341, %o2
-; V9-NEXT:    sllx %o2, 32, %o3
-; V9-NEXT:    or %o3, %o2, %o2
-; V9-NEXT:    and %o1, %o2, %o1
-; V9-NEXT:    sub %o0, %o1, %o0
-; V9-NEXT:    sethi 838860, %o1
-; V9-NEXT:    or %o1, 819, %o1
-; V9-NEXT:    sllx %o1, 32, %o2
-; V9-NEXT:    or %o2, %o1, %o1
-; V9-NEXT:    and %o0, %o1, %o2
-; V9-NEXT:    srlx %o0, 2, %o0
-; V9-NEXT:    and %o0, %o1, %o0
-; V9-NEXT:    add %o2, %o0, %o0
-; V9-NEXT:    srlx %o0, 4, %o1
-; V9-NEXT:    add %o0, %o1, %o0
-; V9-NEXT:    sethi 246723, %o1
-; V9-NEXT:    or %o1, 783, %o1
-; V9-NEXT:    sllx %o1, 32, %o2
-; V9-NEXT:    or %o2, %o1, %o1
-; V9-NEXT:    and %o0, %o1, %o0
-; V9-NEXT:    sethi 16448, %o1
-; V9-NEXT:    or %o1, 257, %o1
-; V9-NEXT:    sllx %o1, 32, %o2
-; V9-NEXT:    or %o2, %o1, %o1
-; V9-NEXT:    mulx %o0, %o1, %o0
-; V9-NEXT:    retl
-; V9-NEXT:    srlx %o0, 56, %o0
+; V9-NEXT:    save %sp, -176, %sp
+; V9-NEXT:    call __clzdi2
+; V9-NEXT:    mov %i0, %o0
+; V9-NEXT:    ret
+; V9-NEXT:    restore %g0, %o0, %o0
 ;
 ; POPC-LABEL: i64_poison:
 ; POPC:       ! %bb.0:

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[llvm-branch-commits] [llvm] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)

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