MacDue wrote: > In the implementation you're interested in, is there not a hazard between > PPRs and GPRs?
There are no hazards between PPRs and GPRs (those types of memory accesses can both be considered as occurring on the CPU). > What's the interaction between this and aarch64-enable-zpr-predicate-spills? It cannot be enabled at the same time. We intend to remove `aarch64-enable-zpr-predicate-spills` after this lands (as it was a stopgap solution). https://github.com/llvm/llvm-project/pull/142392 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
