llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-aarch64 Author: Gaëtan Bossu (gbossu) <details> <summary>Changes</summary> --- Full diff: https://github.com/llvm/llvm-project/pull/173005.diff 2 Files Affected: - (modified) llvm/lib/Target/AArch64/AArch64ISelLowering.cpp (+11) - (modified) llvm/test/CodeGen/AArch64/sve-insert-element.ll (+35-152) ``````````diff diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 837393b0cbdcd..8c56071c5527d 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -27792,6 +27792,17 @@ performInsertVectorEltCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) { if (SDValue Res = removeRedundantInsertVectorElt(N)) return Res; + // Turn INSERT_VECTOR_ELT(undef, Elt, Idx) into SPLAT_VECTOR(Elt) + // Do not bother with inserts into lane 0 because there are patterns to select + // them using INSERT_SUBREG hsub/ssub/dsub. + SDLoc DL(N); + SDValue Vec = N->getOperand(0); + SDValue Elt = N->getOperand(1); + SDValue Idx = N->getOperand(2); + EVT VecVT = Vec.getValueType(); + if (VecVT.isScalableVector() && Vec->isUndef() && !isNullConstant(Idx)) + return DCI.DAG.getNode(ISD::SPLAT_VECTOR, DL, VecVT, Elt); + return performPostLD1Combine(N, DCI, true); } diff --git a/llvm/test/CodeGen/AArch64/sve-insert-element.ll b/llvm/test/CodeGen/AArch64/sve-insert-element.ll index 5cc54929756ff..3e1289b499764 100644 --- a/llvm/test/CodeGen/AArch64/sve-insert-element.ll +++ b/llvm/test/CodeGen/AArch64/sve-insert-element.ll @@ -165,18 +165,12 @@ define <vscale x 16 x i8> @test_lanex_16xi8(<vscale x 16 x i8> %a, i32 %x) { ret <vscale x 16 x i8> %b } -; TODO: Implement DAG combiner. ; INSERT_VECTOR_ELT(undef, ...) -> VECTOR_SPLAT define <vscale x 16 x i8> @test_lanex_16xi8_poison(i8 %e, i32 %x) { ; CHECK-LABEL: test_lanex_16xi8_poison: ; CHECK: // %bb.0: -; CHECK-NEXT: index z0.b, #0, #1 -; CHECK-NEXT: mov w8, w1 -; CHECK-NEXT: ptrue p0.b -; CHECK-NEXT: mov z1.b, w8 -; CHECK-NEXT: cmpeq p0.b, p0/z, z0.b, z1.b -; CHECK-NEXT: mov z0.b, p0/m, w0 +; CHECK-NEXT: mov z0.b, w0 ; CHECK-NEXT: ret %b = insertelement <vscale x 16 x i8> poison, i8 %e, i32 %x ret <vscale x 16 x i8> %b @@ -185,13 +179,7 @@ define <vscale x 16 x i8> @test_lanex_16xi8_poison(i8 %e, i32 %x) { define <vscale x 16 x i8> @test_lanex_16xi8_poison_imm(i8 %e, i32 %x) { ; CHECK-LABEL: test_lanex_16xi8_poison_imm: ; CHECK: // %bb.0: -; CHECK-NEXT: index z0.b, #0, #1 -; CHECK-NEXT: mov w8, w1 -; CHECK-NEXT: ptrue p0.b -; CHECK-NEXT: mov z1.b, w8 -; CHECK-NEXT: mov w8, #5 // =0x5 -; CHECK-NEXT: cmpeq p0.b, p0/z, z0.b, z1.b -; CHECK-NEXT: mov z0.b, p0/m, w8 +; CHECK-NEXT: mov z0.b, #5 // =0x5 ; CHECK-NEXT: ret %b = insertelement <vscale x 16 x i8> poison, i8 5, i32 %x ret <vscale x 16 x i8> %b @@ -200,12 +188,7 @@ define <vscale x 16 x i8> @test_lanex_16xi8_poison_imm(i8 %e, i32 %x) { define <vscale x 8 x i16> @test_lanex_8xi16_poison(i16 %e, i32 %x) { ; CHECK-LABEL: test_lanex_8xi16_poison: ; CHECK: // %bb.0: -; CHECK-NEXT: index z0.h, #0, #1 -; CHECK-NEXT: mov w8, w1 -; CHECK-NEXT: ptrue p0.h -; CHECK-NEXT: mov z1.h, w8 -; CHECK-NEXT: cmpeq p0.h, p0/z, z0.h, z1.h -; CHECK-NEXT: mov z0.h, p0/m, w0 +; CHECK-NEXT: mov z0.h, w0 ; CHECK-NEXT: ret %b = insertelement <vscale x 8 x i16> poison, i16 %e, i32 %x ret <vscale x 8 x i16> %b @@ -214,13 +197,7 @@ define <vscale x 8 x i16> @test_lanex_8xi16_poison(i16 %e, i32 %x) { define <vscale x 8 x i16> @test_lanex_8xi16_poison_imm(i32 %x) { ; CHECK-LABEL: test_lanex_8xi16_poison_imm: ; CHECK: // %bb.0: -; CHECK-NEXT: index z0.h, #0, #1 -; CHECK-NEXT: mov w8, w0 -; CHECK-NEXT: ptrue p0.h -; CHECK-NEXT: mov z1.h, w8 -; CHECK-NEXT: mov w8, #5 // =0x5 -; CHECK-NEXT: cmpeq p0.h, p0/z, z0.h, z1.h -; CHECK-NEXT: mov z0.h, p0/m, w8 +; CHECK-NEXT: mov z0.h, #5 // =0x5 ; CHECK-NEXT: ret %b = insertelement <vscale x 8 x i16> poison, i16 5, i32 %x ret <vscale x 8 x i16> %b @@ -229,12 +206,7 @@ define <vscale x 8 x i16> @test_lanex_8xi16_poison_imm(i32 %x) { define <vscale x 4 x i32> @test_lanex_4xi32_poison(i32 %e, i32 %x) { ; CHECK-LABEL: test_lanex_4xi32_poison: ; CHECK: // %bb.0: -; CHECK-NEXT: index z0.s, #0, #1 -; CHECK-NEXT: mov w8, w1 -; CHECK-NEXT: ptrue p0.s -; CHECK-NEXT: mov z1.s, w8 -; CHECK-NEXT: cmpeq p0.s, p0/z, z0.s, z1.s -; CHECK-NEXT: mov z0.s, p0/m, w0 +; CHECK-NEXT: mov z0.s, w0 ; CHECK-NEXT: ret %b = insertelement <vscale x 4 x i32> poison, i32 %e, i32 %x ret <vscale x 4 x i32> %b @@ -243,13 +215,7 @@ define <vscale x 4 x i32> @test_lanex_4xi32_poison(i32 %e, i32 %x) { define <vscale x 4 x i32> @test_lanex_4xi32_poison_imm(i32 %x) { ; CHECK-LABEL: test_lanex_4xi32_poison_imm: ; CHECK: // %bb.0: -; CHECK-NEXT: index z0.s, #0, #1 -; CHECK-NEXT: mov w8, w0 -; CHECK-NEXT: ptrue p0.s -; CHECK-NEXT: mov z1.s, w8 -; CHECK-NEXT: mov w8, #5 // =0x5 -; CHECK-NEXT: cmpeq p0.s, p0/z, z0.s, z1.s -; CHECK-NEXT: mov z0.s, p0/m, w8 +; CHECK-NEXT: mov z0.s, #5 // =0x5 ; CHECK-NEXT: ret %b = insertelement <vscale x 4 x i32> poison, i32 5, i32 %x ret <vscale x 4 x i32> %b @@ -258,12 +224,7 @@ define <vscale x 4 x i32> @test_lanex_4xi32_poison_imm(i32 %x) { define <vscale x 2 x i64> @test_lanex_2xi64_poison(i64 %e, i32 %x) { ; CHECK-LABEL: test_lanex_2xi64_poison: ; CHECK: // %bb.0: -; CHECK-NEXT: index z0.d, #0, #1 -; CHECK-NEXT: mov w8, w1 -; CHECK-NEXT: ptrue p0.d -; CHECK-NEXT: mov z1.d, x8 -; CHECK-NEXT: cmpeq p0.d, p0/z, z0.d, z1.d -; CHECK-NEXT: mov z0.d, p0/m, x0 +; CHECK-NEXT: mov z0.d, x0 ; CHECK-NEXT: ret %b = insertelement <vscale x 2 x i64> poison, i64 %e, i32 %x ret <vscale x 2 x i64> %b @@ -272,13 +233,7 @@ define <vscale x 2 x i64> @test_lanex_2xi64_poison(i64 %e, i32 %x) { define <vscale x 2 x i64> @test_lanex_2xi64_poison_imm(i32 %x) { ; CHECK-LABEL: test_lanex_2xi64_poison_imm: ; CHECK: // %bb.0: -; CHECK-NEXT: index z0.d, #0, #1 -; CHECK-NEXT: mov w8, w0 -; CHECK-NEXT: ptrue p0.d -; CHECK-NEXT: mov z1.d, x8 -; CHECK-NEXT: mov w8, #5 // =0x5 -; CHECK-NEXT: cmpeq p0.d, p0/z, z0.d, z1.d -; CHECK-NEXT: mov z0.d, p0/m, x8 +; CHECK-NEXT: mov z0.d, #5 // =0x5 ; CHECK-NEXT: ret %b = insertelement <vscale x 2 x i64> poison, i64 5, i32 %x ret <vscale x 2 x i64> %b @@ -287,11 +242,8 @@ define <vscale x 2 x i64> @test_lanex_2xi64_poison_imm(i32 %x) { define <vscale x 2 x half> @test_lanex_nxv2f16_poison(half %h, i64 %idx) { ; CHECK-LABEL: test_lanex_nxv2f16_poison: ; CHECK: // %bb.0: -; CHECK-NEXT: index z1.d, #0, #1 -; CHECK-NEXT: mov z2.d, x0 -; CHECK-NEXT: ptrue p0.d -; CHECK-NEXT: cmpeq p0.d, p0/z, z1.d, z2.d -; CHECK-NEXT: mov z0.h, p0/m, h0 +; CHECK-NEXT: // kill: def $h0 killed $h0 def $z0 +; CHECK-NEXT: mov z0.h, h0 ; CHECK-NEXT: ret %res = insertelement <vscale x 2 x half> poison, half %h, i64 %idx ret <vscale x 2 x half> %res @@ -300,12 +252,7 @@ define <vscale x 2 x half> @test_lanex_nxv2f16_poison(half %h, i64 %idx) { define <vscale x 2 x half> @test_lanex_nxv2f16_poison_imm(i64 %idx) { ; CHECK-LABEL: test_lanex_nxv2f16_poison_imm: ; CHECK: // %bb.0: -; CHECK-NEXT: index z0.d, #0, #1 -; CHECK-NEXT: mov z1.d, x0 -; CHECK-NEXT: ptrue p0.d -; CHECK-NEXT: cmpeq p0.d, p0/z, z0.d, z1.d -; CHECK-NEXT: fmov h0, #1.50000000 -; CHECK-NEXT: mov z0.h, p0/m, h0 +; CHECK-NEXT: fmov z0.h, #1.50000000 ; CHECK-NEXT: ret %res = insertelement <vscale x 2 x half> poison, half 1.5, i64 %idx ret <vscale x 2 x half> %res @@ -314,11 +261,8 @@ define <vscale x 2 x half> @test_lanex_nxv2f16_poison_imm(i64 %idx) { define <vscale x 4 x half> @test_lanex_nxv4f16_poison(half %h, i64 %idx) { ; CHECK-LABEL: test_lanex_nxv4f16_poison: ; CHECK: // %bb.0: -; CHECK-NEXT: index z1.s, #0, #1 -; CHECK-NEXT: mov z2.s, w0 -; CHECK-NEXT: ptrue p0.s -; CHECK-NEXT: cmpeq p0.s, p0/z, z1.s, z2.s -; CHECK-NEXT: mov z0.h, p0/m, h0 +; CHECK-NEXT: // kill: def $h0 killed $h0 def $z0 +; CHECK-NEXT: mov z0.h, h0 ; CHECK-NEXT: ret %res = insertelement <vscale x 4 x half> poison, half %h, i64 %idx ret <vscale x 4 x half> %res @@ -327,12 +271,7 @@ define <vscale x 4 x half> @test_lanex_nxv4f16_poison(half %h, i64 %idx) { define <vscale x 4 x half> @test_lanex_nxv4f16_poison_imm(i64 %idx) { ; CHECK-LABEL: test_lanex_nxv4f16_poison_imm: ; CHECK: // %bb.0: -; CHECK-NEXT: index z0.s, #0, #1 -; CHECK-NEXT: mov z1.s, w0 -; CHECK-NEXT: ptrue p0.s -; CHECK-NEXT: cmpeq p0.s, p0/z, z0.s, z1.s -; CHECK-NEXT: fmov h0, #1.50000000 -; CHECK-NEXT: mov z0.h, p0/m, h0 +; CHECK-NEXT: fmov z0.h, #1.50000000 ; CHECK-NEXT: ret %res = insertelement <vscale x 4 x half> poison, half 1.5, i64 %idx ret <vscale x 4 x half> %res @@ -341,11 +280,8 @@ define <vscale x 4 x half> @test_lanex_nxv4f16_poison_imm(i64 %idx) { define <vscale x 8 x half> @test_lanex_nxv8f16_poison(half %h, i64 %idx) { ; CHECK-LABEL: test_lanex_nxv8f16_poison: ; CHECK: // %bb.0: -; CHECK-NEXT: index z1.h, #0, #1 -; CHECK-NEXT: mov z2.h, w0 -; CHECK-NEXT: ptrue p0.h -; CHECK-NEXT: cmpeq p0.h, p0/z, z1.h, z2.h -; CHECK-NEXT: mov z0.h, p0/m, h0 +; CHECK-NEXT: // kill: def $h0 killed $h0 def $z0 +; CHECK-NEXT: mov z0.h, h0 ; CHECK-NEXT: ret %res = insertelement <vscale x 8 x half> poison, half %h, i64 %idx ret <vscale x 8 x half> %res @@ -354,12 +290,7 @@ define <vscale x 8 x half> @test_lanex_nxv8f16_poison(half %h, i64 %idx) { define <vscale x 8 x half> @test_lanex_nxv8f16_poison_imm(i64 %idx) { ; CHECK-LABEL: test_lanex_nxv8f16_poison_imm: ; CHECK: // %bb.0: -; CHECK-NEXT: index z0.h, #0, #1 -; CHECK-NEXT: mov z1.h, w0 -; CHECK-NEXT: ptrue p0.h -; CHECK-NEXT: cmpeq p0.h, p0/z, z0.h, z1.h -; CHECK-NEXT: fmov h0, #1.50000000 -; CHECK-NEXT: mov z0.h, p0/m, h0 +; CHECK-NEXT: fmov z0.h, #1.50000000 ; CHECK-NEXT: ret %res = insertelement <vscale x 8 x half> poison, half 1.5, i64 %idx ret <vscale x 8 x half> %res @@ -368,11 +299,8 @@ define <vscale x 8 x half> @test_lanex_nxv8f16_poison_imm(i64 %idx) { define <vscale x 2 x bfloat> @test_lanex_nxv2bf16_undef(bfloat %h, i64 %idx) { ; CHECK-LABEL: test_lanex_nxv2bf16_undef: ; CHECK: // %bb.0: -; CHECK-NEXT: index z1.d, #0, #1 -; CHECK-NEXT: mov z2.d, x0 -; CHECK-NEXT: ptrue p0.d -; CHECK-NEXT: cmpeq p0.d, p0/z, z1.d, z2.d -; CHECK-NEXT: mov z0.h, p0/m, h0 +; CHECK-NEXT: // kill: def $h0 killed $h0 def $z0 +; CHECK-NEXT: mov z0.h, h0 ; CHECK-NEXT: ret %res = insertelement <vscale x 2 x bfloat> poison, bfloat %h, i64 %idx ret <vscale x 2 x bfloat> %res @@ -381,12 +309,7 @@ define <vscale x 2 x bfloat> @test_lanex_nxv2bf16_undef(bfloat %h, i64 %idx) { define <vscale x 2 x bfloat> @test_lanex_nxv2bf16_undef_imm(i64 %idx) { ; CHECK-LABEL: test_lanex_nxv2bf16_undef_imm: ; CHECK: // %bb.0: -; CHECK-NEXT: index z0.d, #0, #1 -; CHECK-NEXT: mov z1.d, x0 -; CHECK-NEXT: ptrue p0.d -; CHECK-NEXT: cmpeq p0.d, p0/z, z0.d, z1.d -; CHECK-NEXT: fmov h0, #1.93750000 -; CHECK-NEXT: mov z0.h, p0/m, h0 +; CHECK-NEXT: fmov z0.h, #1.93750000 ; CHECK-NEXT: ret %res = insertelement <vscale x 2 x bfloat> poison, bfloat 1.5, i64 %idx ret <vscale x 2 x bfloat> %res @@ -395,11 +318,8 @@ define <vscale x 2 x bfloat> @test_lanex_nxv2bf16_undef_imm(i64 %idx) { define <vscale x 4 x bfloat> @test_lanex_nxv4bf16_undef(bfloat %h, i64 %idx) { ; CHECK-LABEL: test_lanex_nxv4bf16_undef: ; CHECK: // %bb.0: -; CHECK-NEXT: index z1.s, #0, #1 -; CHECK-NEXT: mov z2.s, w0 -; CHECK-NEXT: ptrue p0.s -; CHECK-NEXT: cmpeq p0.s, p0/z, z1.s, z2.s -; CHECK-NEXT: mov z0.h, p0/m, h0 +; CHECK-NEXT: // kill: def $h0 killed $h0 def $z0 +; CHECK-NEXT: mov z0.h, h0 ; CHECK-NEXT: ret %res = insertelement <vscale x 4 x bfloat> poison, bfloat %h, i64 %idx ret <vscale x 4 x bfloat> %res @@ -408,12 +328,7 @@ define <vscale x 4 x bfloat> @test_lanex_nxv4bf16_undef(bfloat %h, i64 %idx) { define <vscale x 4 x bfloat> @test_lanex_nxv4bf16_undef_imm(i64 %idx) { ; CHECK-LABEL: test_lanex_nxv4bf16_undef_imm: ; CHECK: // %bb.0: -; CHECK-NEXT: index z0.s, #0, #1 -; CHECK-NEXT: mov z1.s, w0 -; CHECK-NEXT: ptrue p0.s -; CHECK-NEXT: cmpeq p0.s, p0/z, z0.s, z1.s -; CHECK-NEXT: fmov h0, #1.93750000 -; CHECK-NEXT: mov z0.h, p0/m, h0 +; CHECK-NEXT: fmov z0.h, #1.93750000 ; CHECK-NEXT: ret %res = insertelement <vscale x 4 x bfloat> poison, bfloat 1.5, i64 %idx ret <vscale x 4 x bfloat> %res @@ -422,11 +337,8 @@ define <vscale x 4 x bfloat> @test_lanex_nxv4bf16_undef_imm(i64 %idx) { define <vscale x 8 x bfloat> @test_lanex_nxv8bf16_poison(bfloat %h, i64 %idx) { ; CHECK-LABEL: test_lanex_nxv8bf16_poison: ; CHECK: // %bb.0: -; CHECK-NEXT: index z1.h, #0, #1 -; CHECK-NEXT: mov z2.h, w0 -; CHECK-NEXT: ptrue p0.h -; CHECK-NEXT: cmpeq p0.h, p0/z, z1.h, z2.h -; CHECK-NEXT: mov z0.h, p0/m, h0 +; CHECK-NEXT: // kill: def $h0 killed $h0 def $z0 +; CHECK-NEXT: mov z0.h, h0 ; CHECK-NEXT: ret %res = insertelement <vscale x 8 x bfloat> poison, bfloat %h, i64 %idx ret <vscale x 8 x bfloat> %res @@ -435,12 +347,7 @@ define <vscale x 8 x bfloat> @test_lanex_nxv8bf16_poison(bfloat %h, i64 %idx) { define <vscale x 8 x bfloat> @test_lanex_nxv8bf16_poison_imm(i64 %idx) { ; CHECK-LABEL: test_lanex_nxv8bf16_poison_imm: ; CHECK: // %bb.0: -; CHECK-NEXT: index z0.h, #0, #1 -; CHECK-NEXT: mov z1.h, w0 -; CHECK-NEXT: ptrue p0.h -; CHECK-NEXT: cmpeq p0.h, p0/z, z0.h, z1.h -; CHECK-NEXT: fmov h0, #1.93750000 -; CHECK-NEXT: mov z0.h, p0/m, h0 +; CHECK-NEXT: fmov z0.h, #1.93750000 ; CHECK-NEXT: ret %res = insertelement <vscale x 8 x bfloat> poison, bfloat 1.5, i64 %idx ret <vscale x 8 x bfloat> %res @@ -449,11 +356,8 @@ define <vscale x 8 x bfloat> @test_lanex_nxv8bf16_poison_imm(i64 %idx) { define <vscale x 2 x float> @test_lanex_nxv2f32_poison(float %f, i64 %idx) { ; CHECK-LABEL: test_lanex_nxv2f32_poison: ; CHECK: // %bb.0: -; CHECK-NEXT: index z1.d, #0, #1 -; CHECK-NEXT: mov z2.d, x0 -; CHECK-NEXT: ptrue p0.d -; CHECK-NEXT: cmpeq p0.d, p0/z, z1.d, z2.d -; CHECK-NEXT: mov z0.s, p0/m, s0 +; CHECK-NEXT: // kill: def $s0 killed $s0 def $z0 +; CHECK-NEXT: mov z0.s, s0 ; CHECK-NEXT: ret %res = insertelement <vscale x 2 x float> poison, float %f, i64 %idx ret <vscale x 2 x float> %res @@ -462,12 +366,7 @@ define <vscale x 2 x float> @test_lanex_nxv2f32_poison(float %f, i64 %idx) { define <vscale x 2 x float> @test_lanex_nxv2f32_poison_imm(i64 %idx) { ; CHECK-LABEL: test_lanex_nxv2f32_poison_imm: ; CHECK: // %bb.0: -; CHECK-NEXT: index z0.d, #0, #1 -; CHECK-NEXT: mov z1.d, x0 -; CHECK-NEXT: ptrue p0.d -; CHECK-NEXT: cmpeq p0.d, p0/z, z0.d, z1.d -; CHECK-NEXT: fmov s0, #1.50000000 -; CHECK-NEXT: mov z0.s, p0/m, s0 +; CHECK-NEXT: fmov z0.s, #1.50000000 ; CHECK-NEXT: ret %res = insertelement <vscale x 2 x float> poison, float 1.5, i64 %idx ret <vscale x 2 x float> %res @@ -476,11 +375,8 @@ define <vscale x 2 x float> @test_lanex_nxv2f32_poison_imm(i64 %idx) { define <vscale x 4 x float> @test_lanex_nxv4f32_poison(float %f, i64 %idx) { ; CHECK-LABEL: test_lanex_nxv4f32_poison: ; CHECK: // %bb.0: -; CHECK-NEXT: index z1.s, #0, #1 -; CHECK-NEXT: mov z2.s, w0 -; CHECK-NEXT: ptrue p0.s -; CHECK-NEXT: cmpeq p0.s, p0/z, z1.s, z2.s -; CHECK-NEXT: mov z0.s, p0/m, s0 +; CHECK-NEXT: // kill: def $s0 killed $s0 def $z0 +; CHECK-NEXT: mov z0.s, s0 ; CHECK-NEXT: ret %res = insertelement <vscale x 4 x float> poison, float %f, i64 %idx ret <vscale x 4 x float> %res @@ -489,12 +385,7 @@ define <vscale x 4 x float> @test_lanex_nxv4f32_poison(float %f, i64 %idx) { define <vscale x 4 x float> @test_lanex_nxv4f32_poison_imm(float %f, i64 %idx) { ; CHECK-LABEL: test_lanex_nxv4f32_poison_imm: ; CHECK: // %bb.0: -; CHECK-NEXT: index z0.s, #0, #1 -; CHECK-NEXT: mov z1.s, w0 -; CHECK-NEXT: ptrue p0.s -; CHECK-NEXT: cmpeq p0.s, p0/z, z0.s, z1.s -; CHECK-NEXT: fmov s0, #1.50000000 -; CHECK-NEXT: mov z0.s, p0/m, s0 +; CHECK-NEXT: fmov z0.s, #1.50000000 ; CHECK-NEXT: ret %res = insertelement <vscale x 4 x float> poison, float 1.5, i64 %idx ret <vscale x 4 x float> %res @@ -503,11 +394,8 @@ define <vscale x 4 x float> @test_lanex_nxv4f32_poison_imm(float %f, i64 %idx) { define <vscale x 2 x double> @test_lanex_nxv2f64_poison(double %d, i64 %idx) { ; CHECK-LABEL: test_lanex_nxv2f64_poison: ; CHECK: // %bb.0: -; CHECK-NEXT: index z1.d, #0, #1 -; CHECK-NEXT: mov z2.d, x0 -; CHECK-NEXT: ptrue p0.d -; CHECK-NEXT: cmpeq p0.d, p0/z, z1.d, z2.d -; CHECK-NEXT: mov z0.d, p0/m, d0 +; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0 +; CHECK-NEXT: mov z0.d, d0 ; CHECK-NEXT: ret %res = insertelement <vscale x 2 x double> poison, double %d, i64 %idx ret <vscale x 2 x double> %res @@ -516,12 +404,7 @@ define <vscale x 2 x double> @test_lanex_nxv2f64_poison(double %d, i64 %idx) { define <vscale x 2 x double> @test_lanex_nxv2f64_poison_imm(i64 %idx) { ; CHECK-LABEL: test_lanex_nxv2f64_poison_imm: ; CHECK: // %bb.0: -; CHECK-NEXT: index z0.d, #0, #1 -; CHECK-NEXT: mov z1.d, x0 -; CHECK-NEXT: ptrue p0.d -; CHECK-NEXT: cmpeq p0.d, p0/z, z0.d, z1.d -; CHECK-NEXT: fmov d0, #1.50000000 -; CHECK-NEXT: mov z0.d, p0/m, d0 +; CHECK-NEXT: fmov z0.d, #1.50000000 ; CHECK-NEXT: ret %res = insertelement <vscale x 2 x double> poison, double 1.5, i64 %idx ret <vscale x 2 x double> %res `````````` </details> https://github.com/llvm/llvm-project/pull/173005 _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
