================
@@ -1060,6 +1060,14 @@ RegBankLegalizeRules::RegBankLegalizeRules(const
GCNSubtarget &_ST,
.Uni(S32, {{UniInVgprS32}, {Vgpr32, Vgpr32, Vgpr32}})
.Div(S32, {{Vgpr32}, {Vgpr32, Vgpr32, Vgpr32}});
+ addRulesForGOpcs({G_AMDGPU_SMED3}, Standard)
+ .Uni(S32, {{UniInVgprS32}, {Vgpr32, Vgpr32, Vgpr32}})
----------------
petar-avramovic wrote:
Check if you can make some actual test for this, maybe some of the existing
tests in combine-short-clamp.ll with inreg argument. I would remove mir tests
for this, there is nothing too specific happening other then uniInVgpr
readanylane, if you can get ll tests.
https://github.com/llvm/llvm-project/pull/176596
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