================
@@ -1060,6 +1060,14 @@ RegBankLegalizeRules::RegBankLegalizeRules(const
GCNSubtarget &_ST,
.Uni(S32, {{UniInVgprS32}, {Vgpr32, Vgpr32, Vgpr32}})
.Div(S32, {{Vgpr32}, {Vgpr32, Vgpr32, Vgpr32}});
+ addRulesForGOpcs({G_AMDGPU_SMED3}, Standard)
+ .Uni(S32, {{UniInVgprS32}, {Vgpr32, Vgpr32, Vgpr32}})
+ .Div(S32, {{Vgpr32}, {Vgpr32, Vgpr32, Vgpr32}});
+
+ addRulesForGOpcs({G_AMDGPU_CVT_PK_I16_I32}, Standard)
----------------
petar-avramovic wrote:
Also think you can move this somewhere to similar opcodes, there should be
sections for integer, fp, loads, intrinsics etc.
https://github.com/llvm/llvm-project/pull/176596
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