================
@@ -677,8 +677,49 @@ bool
AMDGPUInstructionSelector::selectG_MERGE_VALUES(MachineInstr &MI) const {
LLT SrcTy = MRI->getType(MI.getOperand(1).getReg());
const unsigned SrcSize = SrcTy.getSizeInBits();
- if (SrcSize < 32)
+ if (SrcSize < 32) {
+ // Handle sgpr32 <- G_MERGE_VALUES sgpr16, sgpr16
+ if (SrcSize == 16 && DstTy.getSizeInBits() == 32 &&
----------------
petar-avramovic wrote:
try to share code with G_BUILD_VECTOR, I would expect to get S_PACK_LL_B32_B16
instead of mask+shift+or, maybe refactor into some helpers functions.
https://github.com/llvm/llvm-project/pull/200082
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