================ @@ -1,10 +1,8 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py -# RUN: not llc -global-isel -new-reg-bank-select -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -run-pass=instruction-select -mattr=+real-true16 %s 2>&1 | FileCheck -check-prefix=GFX11-ERR %s -# GFX11-ERR: LLVM ERROR: cannot select: %4:sreg_32(s32) = G_MERGE_VALUES %2:sreg_32(s16), %3:sreg_32(s16) (in function: test_merge_s16_into_s32_sgpr) +# RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -run-pass=instruction-select -mattr=+real-true16 -o - %s | FileCheck -check-prefix=GFX11 %s ---------------- petar-avramovic wrote:
-global-isel -new-reg-bank-select are unused for run-pass ```suggestion # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -run-pass=instruction-select -mattr=+real-true16 -o - %s | FileCheck -check-prefix=GFX11 %s ``` https://github.com/llvm/llvm-project/pull/200082 _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
