================
@@ -105,7 +141,8 @@ bool llvm::checkVOPDRegConstraints(const SIInstrInfo &TII,
return false;
} else if (MI.getOpcode() == AMDGPU::V_CNDMASK_B32_e64) {
UniqueScalarRegs.insert(Src2->getReg());
- } else if (!Src2->isReg() || !TRI->isVGPR(MRI, Src2->getReg())) {
+ } else if (!Src2->isReg() ||
+ !isValidVOPDSrc(TII, VOPDOpc, CompIdx, 2, Src2->getReg())) {
----------------
mbrkusanin wrote:
VOPD and VOPD3 encodings only allow sgpr for `src0`. `src1` and `src2` must be
VGPRs.
Names also hint to that `src0X`, `vsrc1X`, `vsrc2X`. The ones that use `src2X`
name have `dst=src2` constraint.
https://github.com/llvm/llvm-project/pull/196515
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