https://bugs.llvm.org/show_bug.cgi?id=39323
Bug ID: 39323
Summary: [AMDGPU][MC][DISASSEMBLER] Incorrect MIMG VAddr size
for many opcodes
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: AMDGPU
Assignee: unassignedb...@nondot.org
Reporter: dpreobrazhen...@luxoft.com
CC: llvm-bugs@lists.llvm.org
Many MIMG instructions have incorrect VAddr size when disassembled.
For example, according with AMD doc, image_gather4 does not support 1D so at
least 2 address components are required (2D). However the following GFX8 code
0x00,0x01,0x00,0xf1,0x01,0x05,0x62,0x00
is disassembled to
image_gather4 v[5:8], v1, s[8:15], s[12:15] dmask:0x1
The expected result is:
image_gather4 v[5:8], v[1:2], s[8:15], s[12:15] dmask:0x1
Well, I assume this is because GFX8 reuses hardcoded tables from GFX9 which
supports a16.
However when looking at GFX9 code, the results are the same. Moreover, a16
modifier does not affect VAddr size. For example, the following GFX9 code
0x00,0x01,0x04,0xf1,0x01,0x05,0x62,0x00
0x00,0x81,0x04,0xf1,0x01,0x05,0x62,0x00
is disassembled to:
image_gather4_cl v[5:8], v1, s[8:15], s[12:15] dmask:0x1
image_gather4_cl v[5:8], v1, s[8:15], s[12:15] dmask:0x1 a16
Note that:
- a16 does not affect VAddr size.
- according with AMD doc, VAddr cannot have less than 3 components for
image_gather4_cl (so at least 2 with a16=1).
Expected results are:
image_gather4_cl v[5:8], v[1:3], s[8:15], s[12:15] dmask:0x1
image_gather4_cl v[5:8], v[1:2], s[8:15], s[12:15] dmask:0x1 a16
This issue results in disassembler test failures for all GATHER and most SAMPLE
instructions for both GFX8 and GFX9. Assembler tests mostly pass (there are no
issues with VAddr size).
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