Changes in directory llvm/include/llvm/Target:
MRegisterInfo.h updated: 1.84 -> 1.85
---
Log message:
Add virtual method spillCalleeSaveRegisters() and restoreCalleeSaveRegisters()
to MRegisterInfo. These allow the target to issue instructions to spill and
restore callee saved registers in case where individual stores / loads aren't
the correct / profitable choice.
---
Diffs of the changes: (+21 -0)
MRegisterInfo.h | 21 +++++++++++++++++++++
1 files changed, 21 insertions(+)
Index: llvm/include/llvm/Target/MRegisterInfo.h
diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.84
llvm/include/llvm/Target/MRegisterInfo.h:1.85
--- llvm/include/llvm/Target/MRegisterInfo.h:1.84 Wed Sep 27 19:07:19 2006
+++ llvm/include/llvm/Target/MRegisterInfo.h Tue Jan 2 14:55:17 2007
@@ -29,6 +29,7 @@
class MachineLocation;
class MachineMove;
class TargetRegisterClass;
+class CalleeSavedInfo;
/// TargetRegisterDesc - This record contains all of the information known
about
/// a particular register. The AliasSet field (if not null) contains a pointer
@@ -319,6 +320,26 @@
// immediates and memory. FIXME: Move these to TargetInstrInfo.h.
//
+ /// spillCalleeSaveRegisters - Issues instruction(s) to spill all callee
saved
+ /// registers and returns true if it isn't possible / profitable to do so by
+ /// issuing a series of store instructions via storeRegToStackSlot(). Returns
+ /// false otherwise.
+ virtual bool spillCalleeSaveRegisters(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MI,
+ const std::vector<CalleeSavedInfo> &CSI) const
{
+ return false;
+ }
+
+ /// restoreCalleeSaveRegisters - Issues instruction(s) to restore all callee
+ /// saved registers and returns true if it isn't possible / profitable to do
+ /// so by issuing a series of load instructions via loadRegToStackSlot().
+ /// Returns false otherwise.
+ virtual bool restoreCalleeSaveRegisters(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MI,
+ const std::vector<CalleeSavedInfo> &CSI) const
{
+ return false;
+ }
+
virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned SrcReg, int FrameIndex,
_______________________________________________
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
