http://llvm.org/bugs/show_bug.cgi?id=7792
Summary: ARM disassembler: rsb, rsc, pkh, ssat instructions
emit zero shifts
Product: new-bugs
Version: trunk
Platform: PC
OS/Version: Linux
Status: NEW
Severity: normal
Priority: P
Component: new bugs
AssignedTo: [email protected]
ReportedBy: [email protected]
CC: [email protected]
(trunk rev 110038)
Hi,
For most instructions, the disassembler does not output shifts where the amount
of the shift is zero. This is the behavior also recommended for ARM
disassemblers by the ARM Architecture Reference Manual.
However, for some instructions, a shift is emitted (this may not be a complete
list):
$ echo '0x01 0x00 0xf0 0x00' |Release+Asserts/bin/llvm-mc --disassemble
--triple=arm
rsceqs r0, r0, r1, lsl #0
$ echo '0x00 0x00 0x62 0x00' |Release+Asserts/bin/llvm-mc --disassemble
--triple=arm
rsbeq r0, r2, r0, lsl #0
$ echo '0x1b 0xf0 0x8b 0x96' |Release+Asserts/bin/llvm-mc --disassemble
--triple=arm
pkhbtls pc, r11, r11, lsl #0
$ echo '0x1c 0x00 0xb0 0x46' |Release+Asserts/bin/llvm-mc --disassemble
--triple=arm
ssatmi r0, #17, r12, lsl #0
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