http://llvm.org/bugs/show_bug.cgi?id=9199
Summary: Not properly lowering memcpy intrinsic using
LDMIA/STMIA on ARM
Product: libraries
Version: trunk
Platform: PC
OS/Version: Linux
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: ARM
AssignedTo: [email protected]
ReportedBy: [email protected]
CC: [email protected]
llvm emits code for "memcpy" intrinsic on ARM as consecutive ldr/str commands,
and further combines them into ldm/stm with special pass after register
allocation. But ldm/stm commands require registers to go in ascending order,
what is often not so after regalloc, therefore some str/ldr commands remain.
For example such code:
struct Foo {int a, b, c, d; };
void CopyStruct(struct Foo *a, struct Foo *b) { *a = *b; }
compiled to:
ldmia r1, {r2, r3, r12}
ldr r1, [r1, #12]
stmia r0, {r2, r3, r12}
str r1, [r0, #12]
bx lr
I ran different tests and always regalloc allocates at least one register not
in ascending order.
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