On Monday 06 July 2009, Michal Simek wrote: > > Does this happen on microblaze-mmu or microblaze-nommu, or both? > > The mmap code for the two is very different. > > > For MMU code.
Could this be a cache-aliasing problem? If your cache is 'virtually-indexed' (most architectures are 'physically-indexed'), the kernel may have written into different parts of the D-cache than what the user space is reading from. If you have a write-through cache, that can explain why you only see the stale data at the beginning of the page -- the cache controller is still busy writing back the data when you start reading it from DRAM through the cache alias. If this is your problem, then you need to implement flush_dcache_page() and other functions that maintain cache consistency. See Documentation/cachetlb.txt and http://www.linuxjournal.com/article/7105 Arnd <>< ------------------------------------------------------------------------------ _______________________________________________ Ltp-list mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/ltp-list
