Arnd Bergmann wrote: > On Monday 06 July 2009, Michal Simek wrote: > >>> Does this happen on microblaze-mmu or microblaze-nommu, or both? >>> The mmap code for the two is very different. >>> >>> >> For MMU code. >> > > Could this be a cache-aliasing problem? If your cache is 'virtually-indexed' > (most architectures are 'physically-indexed'), the kernel may have written > into different parts of the D-cache than what the user space is reading > from. If you have a write-through cache, that can explain why you only > see the stale data at the beginning of the page -- the cache controller > is still busy writing back the data when you start reading it from > DRAM through the cache alias. > I don't think so because we run that test on Microblaze without caches and test failed too. I think that this is sufficient test to tell that the problem is not relate with caches.
Michal > If this is your problem, then you need to implement flush_dcache_page() > and other functions that maintain cache consistency. See > Documentation/cachetlb.txt and http://www.linuxjournal.com/article/7105 > > Arnd <>< > -- Michal Simek, Ing. (M.Eng) PetaLogix - Linux Solutions for a Reconfigurable World w: www.petalogix.com p: +61-7-30090663,+42-0-721842854 f: +61-7-30090663 ------------------------------------------------------------------------------ _______________________________________________ Ltp-list mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/ltp-list
