I already suspect that but till now nobody could help me so far in the
official support forums from xilinx.
However, thanks for your help. Maybe someone's here with some xilinx
experiences too.
Kieran Mansley schrieb:
On Fri, 2010-03-19 at 14:16 +0100, Marianovich, Andre wrote:
Well, I made some test with wireshark and there was not a single bit
sent from the board.
Apart from that the Xilinx documents says that raw api needs
interrupts
and maybe I have to trace something more in that way. However, if
there
are some more hints tell me please.
It sounds like you need some help from Xilinx, or someone who
understands that setup, to get it properly integrated into your hardware
project. I don't have any experience of that, so can't help, but there
may be others on the list who have used the same hardware and Xilinx
port of lwIP who may be able to offer advice.
Kieran
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