On 7/1/2013 9:00 PM, Jeff Barlow wrote:
On 7/1/2013 12:56 AM, Claudius Zingerli wrote:
[RMII-Clock from PLL is bad]
This is a known issue. Deriving the RMII-Clock with the STM32-PLL is
just not a robust design.
There are several PHY chips (Micrel, etc) that have built in RMII clock
generators that can use a low cost 25MHz crystal and provide a nice low
jitter clock back to the MCU.
In the final design, we plan use a 3-port switch from Micrel. It can be
clocked from 25MHz or 50MHz, but the board I'm using to develop the
software has a DP83848 that does need a 50MHz clock source for RMII.
STM32F4 /might/ be able to handle 50MHz as a main clock source. (The
datasheet is ambiguous about that: The drawing says 4-26MHz HSE, but the
table says 1-50MHz HSE. One could interpret that as from 26MHz one has
to use an oscillator, below an Xtal would fit as well)
Regards
Claudius
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