On boot up one of the first things the M100 does is to configure the PIO (81C55) in order to scan the keyboard for the ctrl-break. The PIO and LCD all use port addresses, there should be a lot of activity on the IO/M pin on a normal boot! Indeed within about 10 instructions, for a normal boot, the IO/M pin should be toggling quite a lot :)
However if the address or data lines are failing then it might just execute code that does not include any IO/M based operations. For example, if the mux is broken then the reset vector might never be loaded so it could just execute random code. I tend to feel the 80C85 is probably OK (the fact the IO/M line toggles on reset is a good sign), as is the ROM. Most likely there is a buffer issue either a failed line, very weak drive or even a simple dry joint. The parts are quite old and some might just fail due to age. If you can I would check the address and data lines are all being driven with full voltage swings and none are stuck or just hovering around. This is kind of hard to do easily but might save you the headache of replacing a 40pin CPU package. You might want to check the +5V is OK on all the chips just in case the leaking caps did etch through a power copper trace. From: M100 <[email protected]<mailto:[email protected]>> on behalf of Jeffrey Birt <[email protected]<mailto:[email protected]>> Reply-To: <[email protected]<mailto:[email protected]>> Date: Tuesday, May 1, 2018 at 1:10 AM To: <[email protected]<mailto:[email protected]>> Subject: Re: [M100] SPAM-LOW: Re: New member - question on 'half' alive Model 100 While I agree the ROM is not a usual failure point they can fail. I may just go ahead and order an 80C85 but I hate to throw parts at it. The fact that the IO/M does not change states when it is ‘running’ (it does change states on reset) bothers me. Even if it were running garbage code due to an address/data latch issue what are the odds that it would never try to address the IO address space? Thanks, Jeff --
