This doesn't matter but on the TPDD1, if you set the dip switches to
OFF ON ON ON, then you can dump the rom at 19200, and in that case I
need to add a sleep after each S-record. I added 30ms just based a note
for something else somewhere in the service manual that you should wait
25ms to between sending and reading, and 20ms didn't work, 25 did. So I
just padded that to 30 to be safe.
No per-char delay, just one per S-rec.
The other "init 19200" setting in the manual seems to be something that
reads the disk automatically like tpdd2 does.
The tpdd1 software manual dip switch table says:
"
mode baud 1 2 3 4
init 9600 ON ON ON ON *
init 19200* OFF ON ON ON *
init 19200* ON OFF ON ON
[...]
* First 19200 is for initialization. Second 19200 is for boot sequence
(operation mode).
"
And the rom dumper works at 19200 with OFF ON ON ON,
And ON OFF ON ON does the following right at power-on:
- With no drive inserted, door open or closed:
Batt light flash rapidly and continuously.
- With a disk inserted but not the tpdd1 util disk, this includes a
regular filesystem disk, a raw data disk (no filesystem, ie the sardine
dictionary disk), or a tpdd2 disk that the drive can't read at all.:
Drive access light and disk motor on for about 1 second, then off,
repeat forever.
- With the tpdd1 util disk inserted:
Drive access light and disk motor on for about one second, then off,
and stays off.
But although something about the tpdd1 util disk satisifies the drive in
some way, it doesn't work like the tpdd2 bootstrap where you just open
the com port before powering on and the drive will start spitting
something out the serial port without having to send those srecords from
the normal tpdd1 boot directions.
I can only guess this was never intended for the fb-100 or knitting
machines, since the fb-100 has only solder-jumpers in place of the dip
switches. But maybe the same drive was going to be built in to some word
processor or typewriter.
On 1/28/24 13:11, Darren Clark wrote:
Nice find! I wasn't looking at port 4 data since I assumed it was all
address outputs, but P43, P44, P45 are configured as inputs on the TPDD2
(not on the TPPD1).
;Port4.B0 I/O Pin37 P40 A8
;Port4.B1 I/O Pin36 P41 A9
;Port4.B2 I/O Pin35 P42 A10
;Port4.B3 Input Pin32 P43 A11 E1 *Config jumper pulled hi
;Port4.B4 Input Pin31 P44 A12 E2 *Config jumper pulled hi
;Port4.B5 Input Pin30 P45 A13 E3 *Config jumper pulled hi
;Port4.B6 I/O Pin29 P46 A14 *CS1 on CPLD
;Port4.B7 I/O Pin28 P47 A15 *CS0 on CPLD
I've renamed the variable from '(RAM_INT)SerDatTX_2' to
'(RAM_INT)PCB_ConfigSwitchesE1E2E3' this makes more sense.
I see in the code (F1FE to F210) the firmware is looking at E3 to
determine while transmitting data to the serial port if it should use
hardware flow control or XON (0x11) / XOFF (0x13), and then reads the
serial data looking for an XON or XOFF byte.
E1 = ??
E2 = ??
E3 = Flow control - open is hardware, closed is software.
Another TPDD2 secret discovered! I'll do some more documenting in the
code and update my GitHub tonight.
Daren Clark
On 1/28/24 08:48, Stephen Adolph wrote:
I'll add some info from your nicely documented code.
* A13 value is tested at 0xF1FE, and controls a branch to 0xF1EB;
seems to change the way serial data is transmitted. hardware default
is to branch.
* A12 value is tested at 0xF071, not sure what it does yet. hardware
default is to branch.
* A11 value is tested at 0xFF48, seems to change hardware interrupt
handling. hardware default is to branch.
On Sun, Jan 28, 2024 at 8:31 AM Stephen Adolph <[email protected]>
wrote:
Darren, another question,
There are some inputs on pins 30,31,32 (called A13, A12, A11) that
correspond to P45, P44, P43 on the HD6301.
Port 4 of the HD6301 is hooked up to pins 73.36,35,32,32,30,29,28
for P40-P47.
I'll go look at the code, but these 3 inputs are configurable. I
wonder what they do?
Steve
On Sun, Jan 28, 2024 at 8:21 AM Stephen Adolph
<[email protected]> wrote:
Thanks Darren.
Now that we have the real tpdd firmware I wonder what we can
do with it. Some of those variables look tempting, like side
and # of tracks.
Another question.. it looks like was there a second
unpopulated serial port on the drive? Anything in the code on
that?
P7 is unpopulated and not in the schematic, but it is there.
Steve
--
bkw
