The caches are write allocate: in the case of a write miss, an MSHR entry will be allocated and a block *read* request will be issued to the next level of cache to do the fill.

Steve

Magic Zheng wrote:

Dear Sir,
I want to confirm the understanding of cache implementation on write. For each level cache (L1 and L2), if there are write hits on cache, we tag the cache block dirty. However, if there are write misses; we allocate an entry on MSHR and try to write through to next level memory. (Here we do not allocate a cache block and read the content from the next level memory?) Could you please point my understanding is correct or not? If yes, it will create many writes to next level memory; could you explain the intention here? Thank you for your time? Magic.

------------------------------------------------------------------------
Yahoo! Shopping
Find Great Deals on Holiday Gifts at Yahoo! Shopping <http://us.rd.yahoo.com/mail_us/footer/shopping/*http://shopping.yahoo.com/;_ylc=X3oDMTE2bzVzaHJtBF9TAzk1OTQ5NjM2BHNlYwNtYWlsdGFnBHNsawNob2xpZGF5LTA1 >



-------------------------------------------------------
This SF.net email is sponsored by: Splunk Inc. Do you grep through log files
for problems?  Stop!  Download the new AJAX search engine that makes
searching your log files as easy as surfing the  web.  DOWNLOAD SPLUNK!
http://ads.osdn.com/?ad_id=7637&alloc_id=16865&op=click
_______________________________________________
m5sim-users mailing list
[email protected]
https://lists.sourceforge.net/lists/listinfo/m5sim-users

Reply via email to