Hello, I'm getting the following error when using the MOESI coherence protocol for my cache hierarchy in CMP-simulations. All caches have only one MSHR and thus use the blocking buffer miss queue implementation.
fatal: Shouldn't call this on a blocking buffer. @ cycle 101 [addTarget:m5/mem/cache/miss/blocking_buffer.hh, line 246] Any idea what's happening and how to fix this? (Besides using more MSHRs :) ) Thanks, Jos Delbar [EMAIL PROTECTED] ------------------------------------------------------- Using Tomcat but need to do more? Need to support web services, security? Get stuff done quickly with pre-integrated technology to make your job easier Download IBM WebSphere Application Server v.1.0.1 based on Apache Geronimo http://sel.as-us.falkag.net/sel?cmd=lnk&kid0709&bid&3057&dat1642 _______________________________________________ m5sim-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/m5sim-users
