Possibly,

Need to do some testing once I get the first rev assembled. This Particular 
board is probably a bit too expensive to make for the open source world to 
want, and the I/O arrangement is somewhat specific to my needs. That many 
Phoenix Contact blocks gets pretty expensive.

I'll probably drop some OS version into the wild once I get it sorted, with 
a more general I/O layout. This board is setup with 6 differential (or 
single ended) encoder inputs, 6 differential stepgen outputs, 16 5v-30v 
inputs, 24 field voltage outputs up to 500ma, 2 opto-mosfet outputs @2A 
snubbed. Has a 5A 5v DC-DC regulator that will accept up to 42VDC, power 
the DE10-nano through GPIO and output the spare 5v up to 3A. My method of 
stepgen outputs and GP inputs needs some testing.

On Monday, June 10, 2019 at 7:00:13 PM UTC-4, [email protected] wrote:
>
> Jun 11, 2019, 12:53 AM by [email protected] <javascript:>: 
>
> > Put the Machinekit setup stuff to the side for a bit to get a PCB going. 
> Got some boards getting fabbed and some components on the way. 
> > 
> > 
> > 
> > 
> > 
> Is some open-source project lurking in this image? 
>
> Cern. 
>
>
> > 
> > On Sunday, May 12, 2019 at 10:00:18 AM UTC-4, Michael Brown wrote: 
> > 
> >> It sounds to me like you are takling about opendrain: 
> >> https://github.com/the->> snowwhite/mksocfpga/blob/>> 
> master/HW/QuartusProjects/>> Common/gpio_adr_decoder_reg.>> sv#L33 <
> https://github.com/the-snowwhite/mksocfpga/blob/master/HW/QuartusProjects/Common/gpio_adr_decoder_reg.sv#L33>
>  
>
> >> 
> >> If you want this functionality for inputs you have to use the  
> >> 
> >> active high: 
> >> 
> >> 
> >> 
> >> net limit-x-min <= hm2_[HOSTMOT2](BOARD).>> 0.gpio.>> 010.in <
> http://0.gpio.010.in> 
> >> active low: 
> >> 
> >> 
> >> 
> >> 
> >> net limit-x-min <= hm2_[HOSTMOT2](BOARD).0.gpio.>> 010.in_not 
> >> 
> >> 
> >> 
> >> On Sunday, 12 May 2019 13:21:46 UTC+2, justin White  wrote: 
> >> 
> >>> Got another silly question.... 
> >>> 
> >>> Is it possible to invert the default state of the GPIO pins? I've 
> found that pulling them up will bring them true, Hardware wise the easiest 
> way I've found to make the inputs capable of handling multiple input 
> voltages will require them to be pulled down when activated, so I'd have to 
> pull them up to a "false" state. This would only be something I need to do 
> with the gpio inputs. 
> >>> 
> >>> On Friday, May 10, 2019 at 6:40:30 PM UTC-4, Michael Brown wrote: 
> >>> 
> >>>> Ok 
> >>>> Great to hear you have progress. 
> >>>> 
> >>>> On a side note: 
> >>>> I managed to find the bug in the ADC system and the fix got out into 
> the socfpga-rbf deb yesterday.... :-=)   
> >>>> 
> >>>> On Friday, 10 May 2019 22:26:13 UTC+2, justin White  wrote: 
> >>>> 
> >>>>>> When you are laying out your own custom DExx interface board, you 
> don't have to stay restricted to allready made pinouts. 
> >>>>>> 
> >>>>> Yeah that I know,  Like I said, I was mostly trying to determine how 
> many pins each tag type used and it's actual usage. I was a bit hung up on 
> the ADC thing because it didn't directly correspond with the pin tags but 
> now I realize it's an SPI interface. 
> >>>>> 
> >>>>> I'll have to come back to all of the above info once I try to create 
> the new FPGA project files, for now I think I get the idea. 
> >>>>> 
> >>>>> Purging the installed Machinekit packages and installing the new 
> ones as you suggested got HALshow working right away.  
> >>>>> 
> >>>>> I've pretty much got my encoder interface and output hardware 
> sorted, I use 24v I/0 but it should handle multiple voltages. 
> >>>>> 
> > 
> > 
> > 
> > -- 
> >  website: > http://www.machinekit.io <http://www.machinekit.io>>  blog: 
> > http://blog.machinekit.io <http://blog.machinekit.io>>  github: > 
> https://github.com/machinekit <https://github.com/machinekit> 
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