Thinking DExx gpio wise:

As I'm struggeling to find out exact how fast a datarate the pins on the 
Mezzaine connector have, this is just pure speculation, however:

The mezzanine has 16 differential I/O's (plus some dedicated differential 
clock pins), So it might be possible to 
create a highspeed serial bus there and route to 2 x 36 parallel GPIO pins 
(DExx style) ?


On Tuesday, 27 August 2019 01:01:43 UTC+2, justin White wrote:
>
> Curious what the current use case for the ultra96 might be. There's 
> mezzanines available that are suitable for machine control as far as I'm 
> aware. The "high density" "low density" gpio connectors look like a PIA to 
> work with. If they stuck that SOC on a form factor similar to the DE10 Nano 
> it'd be pretty serious.
>
> On Monday, August 26, 2019 at 3:15:18 PM UTC-4, Michael Brown wrote:
>>
>> So now have a fully compiled and implemented Ultra96 design, just have to 
>> figure out how to test it...(pin file, device tree etc).
>>
>> It would be nice af someone could spin up a 2018.3 Vivado Docker Image...
>> (or input some very verbose instructions as to how) :-)
>>
>>

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