Hello!

Some data of my machine (for reference):

# dmidecode | egrep '(Version|Release)'
        Version:    MBP22.88Z.00A5.B01.0611031551
        Release Date: 11/03/06
        Version: 1.0
        Version: PVT
        Version: Mac-F42187C8
        Version: Intel(R) Core(TM)2 CPU
        Version: Intel(R) Core(TM)2 CPU


This is what I found out:
-------------------------

From the following document (page 16)
  http://www.linux-pm.org/docs/pm-summit-0406-acpi.pdf
we have an c-state overview :

       Intel Core Duo Processor SV
    Name                        Vcc  Watt
C0  High Frequencey Mode (P0)   1.3  31
C0  Low Frequency Mode (Pn)     1.0
C1  Auto Halt Stop Grant (HFM)       15.8
C1E Enhanced Halt (LFM)              4.8
C2  Stop Clock (HFM)                 15.5
C2E Enhanced Stop Clock (LFM)        4.7
C3  Deep Sleep (HFM)                 10.5
C3E Enhanced Deep Sleep (LFM)        3.4
C4  Intel Deeper Sleep          0.85 2.2
DC4 Intel Enhanced Deeper Sleep 0.80 1.8


Generally there are two techniques to set the processor in
sleep state.

 1) By using an certain I/O port (reading a value)
 2) By using the monitor/mwait opcodes

The MacBook Pro is using the second one.

It's using the values from ACPI, which are reported via the _CST method.
Here you will found (on my MBP C2D), that the _CST method reports the following:
(Enable this output by compiling the kernel with ACPI debug and give kernel
 the following parameter:   acpi_dbg_layer=32767 acpi_dbg_level=32767)

[   51.979142] dswstate-0549 [05] ds_get_current_walk_st: Current WalkState 
00000000
[   51.979441]  psxface-0291 [03] ps_execute_method     : Method returned 
ObjDesc=c2209d6c
[   51.979739]   exdump-0497 [03] ex_dump_operand       : c2209d6c Package [Len 
4] ElementArray c2242860
[   51.980129]   exdump-0495 [03] ex_dump_operand       :  [1] c2209b64 Integer 
0000000000000003
[   51.980519]   exdump-0495 [03] ex_dump_operand       :  [1] c2221754 Package 
[Len 4] ElementArray f7a559e0
[   51.980910]   exdump-0495 [03] ex_dump_operand       :   [2] c2209b14 Buffer 
len 11 @ c2242740
[   51.981300] Buffer Contents:  82 0c 00 7f 01 02 00 00 00 00 00 00 00 00 00 
79 00
[   51.983064]   exdump-0495 [03] ex_dump_operand       :   [2] c222172c 
Integer 0000000000000001
[   51.983454]   exdump-0495 [03] ex_dump_operand       :   [2] c2209ca4 
Integer 0000000000000001
[   51.983843]   exdump-0495 [03] ex_dump_operand       :   [2] c2221ac4 
Integer 00000000000003E8
[   51.984232]   exdump-0495 [03] ex_dump_operand       :  [1] c2209bdc Package 
[Len 4] ElementArray f7862300
[   51.984623]   exdump-0495 [03] ex_dump_operand       :   [2] c2209c7c Buffer 
len 11 @ f7a55a40
[   51.985013] Buffer Contents:  82 0c 00 7f 01 02 00 10 00 00 00 00 00 00 00 
79 00
[   51.986765]   exdump-0495 [03] ex_dump_operand       :   [2] c2209aec 
Integer 0000000000000002
[   51.987159]   exdump-0495 [03] ex_dump_operand       :   [2] c2209bb4 
Integer 0000000000000001
[   51.987549]   exdump-0495 [03] ex_dump_operand       :   [2] c2221a9c 
Integer 00000000000001F4
[   51.987939]   exdump-0495 [03] ex_dump_operand       :  [1] c2221664 Package 
[Len 4] ElementArray c20de5c0
[   51.988330]   exdump-0495 [03] ex_dump_operand       :   [2] c2209b8c Buffer 
len 11 @ f78622e0
[   51.988720] Buffer Contents:  82 0c 00 7f 01 02 00 31 00 00 00 00 00 00 00 
79 00
[   51.990472]   exdump-0495 [03] ex_dump_operand       :   [2] c210790c 
Integer 0000000000000003
[   51.990866]   exdump-0495 [03] ex_dump_operand       :   [2] c2107934 
Integer 0000000000000037
[   51.991256]   exdump-0495 [03] ex_dump_operand       :   [2] c2209cf4 
Integer 0000000000000064
[   51.991646]   nseval-0233 [02] ns_evaluate           : *** Completed 
evaluation of object _CST ***
[   51.991989] ACPI: CPU1 (power states: C1[C1] C2[C2] C3[C3])

If you want, you can also take a look on the ACPI code (using 'acpidump' [from 
the pm-tools] and
the 'iasl' ACPI (de)compiler [from the Intel Site: 
http://www.intel.com/technology/iapc/acpi/downloads.htm]
and will get the following (the comments after # are mine):

            If (And (PDC0, 0x0300))
            {
                If (And (CFGD, 0x80))
                {
                    Return (Package (0x04)     # Package of 4 entries
                    {
                        0x03,                  # Number of C-State available
                        Package (0x04)
                        {
                            ResourceTemplate ()
                            {
                                Register (FFixedHW,
                                    0x01,               // Bit Width
                                    0x02,               // Bit Offset
                                    0x0000000000000000, // Address         # 
Value for MWAIT (EAX)
                                    ,)
                            },

                            0x01,              # C-State: C1
                            0x01,              # Latency
                            0x03E8             # Power
                        },

                        Package (0x04)
                        {
                            ResourceTemplate ()
                            {
                                Register (FFixedHW,
                                    0x01,               // Bit Width
                                    0x02,               // Bit Offset
                                    0x0000000000000010, // Address         # 
Value for MWAIT (EAX)
                                    ,)
                            },

                            0x02,             # C-State: C2
                            0x01,             # Latency
                            0x01F4            # Power
                        },

                        Package (0x04)
                        {
                            ResourceTemplate ()
                            {
                                Register (FFixedHW,
                                    0x01,               // Bit Width
                                    0x02,               // Bit Offset
                                    0x0000000000000031, // Address        # 
Value for MWAIT (EAX)
                                    ,)
                            },

                            0x03,             # C-State: C3 (or above)
                            0x37,             # Latency
                            0x64              # Power
                        }
                    })
                }

You will find the value for MWAIT in the ACPI-debug output of the kernel too,
here it is:
[   51.988720] Buffer Contents:  82 0c 00 7f 01 02 00 31 00 00 00 00 00 00 00 
79 00
                                                      -----------------------

The Linux kernel will use this values in the 
'acpi_processor_ffh_cstate_enter(..)'
function [ in /arch/i386/kernel/acpi/cstate.c ] called from
 'acpi_cstate_enter(..)' [ in drivers/acpi/processor_idle.c ] to enter the 
state.

The 'acpi_processor_ffh_cstate_probe' will check a bootup (via the 'cpuid(5)' 
opcode
[see also: http://www.flounder.com/cpuid_explorer2.htm#CPUID(5)]), if the 
reported
c-states are supported.

The Apple driver "AppleIntelCPUPowerManagement" will do something very similar 
(testing
the validity with cpuid and using monitor/mwait)...


Accorting to the Intel documentation we can set the following:

        Table 3-63. MWAIT Hints Register (EAX)

Bits                                   Description
3:0   Sub C-state within a C-state, indicated by bits [7:4]
7:4   Target C-state*
      Value of 0 means C1; 1 means C2 and so on
      Value of 01111B means C0
      Note: Target C states for MWAIT entensions are processor-specific 
C-states,
      not ACPI C-states
31: 8 Reserved


This would mean (in my case):

 0x0000000000000000 => C1 (Sub C-State 0)
 0x0000000000000010 => C2 (Sub C-State 0)
 0x0000000000000031 => C4 (Sub C-State 1)

C4 is reported as C3, because all C-States above C2 are C3-States.
I haven't found any specification about the Sub C-States...
Some other laptops will add the real C3 state (0x0000000000000020), but I do
not think this will help us...


Details on this you will find in the Intel Datasheets:

 - INSTRUCTION SET REFERENCE, A-M, Vol. 2 3-697 (Page 739)
   [ http://www.intel.com/products/processor/manuals/index.htm ]

 - Intel Core2 Duo Processor for Intel Centrino Duo Processor
   Technology Datasheet, Section 2 (Starting at page 11 and
   section 2.3 on page 19)
   [ http://www.intel.com/design/mobile/datashts/314078.htm

There are some interesting details, maybe somebody will get another idea
by reading this...

I patched the file "arch/i386/kernel/acpi/cstate.c" to see the MWAIT
value the kernel will really use:

--- cstate.c.orig       2006-12-11 20:32:53.000000000 +0100
+++ cstate.c    2007-04-13 11:41:12.000000000 +0200
@@ -123,7 +123,7 @@
        if (!mwait_supported[cstate_type]) {
                mwait_supported[cstate_type] = 1;
                printk(KERN_DEBUG "Monitor-Mwait will be used to enter C-%d "
-                      "state\n", cx->type);
+                      "state (hint: %lx)\n", cx->type, cx->address);
        }

 out:

...and it reported the correct values (0x31 for C4x)

On my laptop I have ( cat /proc/acpi/processor/CPU?/power ):

    C1: type[C1] promotion[C2] demotion[--] latency[001] usage[00226130] 
duration[00000000000000000000]
    C2: type[C2] promotion[C3] demotion[C1] latency[001] usage[21500702] 
duration[00000000128392689078]
   *C3: type[C3] promotion[--] demotion[C2] latency[055] usage[35788171] 
duration[00000000178340127102]

    C1: type[C1] promotion[C2] demotion[--] latency[001] usage[00218680] 
duration[00000000000000000000]
   *C2: type[C2] promotion[C3] demotion[C1] latency[001] usage[23126141] 
duration[00000000106657661085]
    C3: type[C3] promotion[--] demotion[C2] latency[055] usage[52515373] 
duration[00000000207259689603]

... so it's actual using this C4 state!

(The old MacBook Pro seems to show the C3 state only in battery mode. Maybe 
it's only an old firmware?!)


On possible problem is, that every interrupts and bus-master activity will wake 
up the processor
from it's deeper c-states. A typical source of many interrupts are the USB 
interfaces.

root# cat /proc/interrupts
           CPU0       CPU1
  0:   23870400          0   IO-APIC-edge      timer
  9:      18554          0   IO-APIC-fasteoi   acpi
 14:    1043107          0   IO-APIC-edge      libata
 15:          0          0   IO-APIC-edge      libata
 16:    5287526          0   IO-APIC-fasteoi   uhci_hcd:usb4, fglrx
 17:    1366655    2982041   IO-APIC-fasteoi   wlan0
 18:         77          0   IO-APIC-fasteoi   uhci_hcd:usb3
 19:     407238     250404   IO-APIC-fasteoi   libata, uhci_hcd:usb2, ohci1394
 20:    7130371   12155769   IO-APIC-fasteoi   uhci_hcd:usb1, ehci_hcd:usb5
 21:      42443          0   IO-APIC-fasteoi   HDA Intel
219:     226569     156826   PCI-MSI-edge      eth0
NMI:          0          0
LOC:   23870343   23867464
ERR:          0
MIS:          0

The following hopes I have:

 1) The auto USB suspend framework will solve the too-many interrupts problems.
 2) The dyn-ticks patches will allow the processor to sleep longer.

Maybe this will solve the problems...

Does anybody know, if we can query the C1-C3 duration and usage values from 
MacOSX?
It would be interesting to compare them...


I also found this in the Intel Specs:
 To enable the package level Intel Enhanced Deeper Sleep Low Voltage, Dynamic
 Cache Sizing and Intel Enhanced Deeper Sleep state fields must be configured
 in the software programmable MSR.

I checked these with a MSR tool for Linux (http://www.etallen.com/msr.html) and 
the
Reggie Tool from the MacOSX CHUD package. I compared these and the settings are
the same.


Now I need some more ideas what to check or test...

Regards
 Sven

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