From: Hitesh K. Patel <[email protected]> 1) In DPU exit DSR only turned on TE for either pipe 0 or pipe 2. 2) Removed command mode and video mode kernel config options from Kconfig. 3) Removed dead DPU/DSR code
Signed-off-by: Jackie Li <[email protected]> Signed-off-by: Hitesh K. Patel <[email protected]> --- drivers/staging/mrst/Kconfig | 36 +----- drivers/staging/mrst/drv/mdfld_dsi_dbi_dpu.c | 60 +++++++++- drivers/staging/mrst/drv/mdfld_dsi_dbi_dpu.h | 7 +- drivers/staging/mrst/drv/psb_drv.c | 124 +++++++------------- drivers/staging/mrst/drv/psb_drv.h | 76 +------------ drivers/staging/mrst/drv/psb_intel_display2.c | 58 +--------- drivers/staging/mrst/drv/psb_intel_drv.h | 34 ------ .../linux_framebuffer_mrst/mrstlfb_linux.c | 14 ++- 8 files changed, 121 insertions(+), 288 deletions(-) diff --git a/drivers/staging/mrst/Kconfig b/drivers/staging/mrst/Kconfig index 4863f5e..9ff95ff 100644 --- a/drivers/staging/mrst/Kconfig +++ b/drivers/staging/mrst/Kconfig @@ -58,41 +58,18 @@ config DRM_MDFLD If M is selected the module will be called mid_gfx. config MDFLD_DSI_DSR - bool "Support DSI Display Self Refreshment" - depends on MDFLD_DSI_DBI + bool "Support DSI Fullscreen Display Self Refreshment " + depends on DRM_MDFLD && !MDFLD_DSI_DPU default y help Choose this option if you have a Type1 MIPI panel. config MDFLD_DSI_DPU bool "Support DSI Display Partial Update" - depends on MDFLD_DSI_DBI - default n - help - Choose this option to enable DPU - -config MDFLD_DSI_DBI - bool "Support DSI Command Mode" depends on DRM_MDFLD - default y - select MDFD_COMMAND_MODE - select MDFD_COMMAND_MODE_2 - help - xxxxxxxx - -config MDFLD_DSI_DPI - bool "Support DSI Video Mode" - depends on DRM_MDFLD && !MDFLD_DSI_DBI default n help - xxxxxxx - -config MDFD_COMMAND_MODE - bool "SUPPORT_MIPI_COMMAND_MODE" - depends on DRM_MDFLD && MDFLD_DSI_DBI - default n - help - xxxxxx + xxxxxx config MDFD_DUAL_MIPI bool "SUPPORT_DUAL_MIPI_DISPLAYS" @@ -101,13 +78,6 @@ config MDFD_DUAL_MIPI help xxxxxx -config MDFD_COMMAND_MODE_2 - bool "SUPPORT_MIPI_COMMAND_MODE_2" - depends on DRM_MDFLD && MDFLD_DSI_DBI && MDFD_DUAL_MIPI - default y - help - xxxxxx - config MDFD_HDMI bool "SUPPORT_HDMI_DISPLAY" depends on DRM_MDFLD diff --git a/drivers/staging/mrst/drv/mdfld_dsi_dbi_dpu.c b/drivers/staging/mrst/drv/mdfld_dsi_dbi_dpu.c index 106ec19..5510d0c 100644 --- a/drivers/staging/mrst/drv/mdfld_dsi_dbi_dpu.c +++ b/drivers/staging/mrst/drv/mdfld_dsi_dbi_dpu.c @@ -165,9 +165,9 @@ static int mdfld_overlay_damage(struct mdfld_dbi_dpu_info * dpu_info, return 0; } -int mdfld_dbi_dpu_report_damage(struct drm_device * dev, - mdfld_plane_t plane, - struct psb_drm_dpu_rect * rect) +int mdfld_dbi_dpu_report_damage(struct drm_device * dev, + mdfld_plane_t plane, + struct psb_drm_dpu_rect * rect) { struct drm_psb_private * dev_priv = dev->dev_private; struct mdfld_dbi_dpu_info * dpu_info = dev_priv->dbi_dpu_info; @@ -196,6 +196,46 @@ int mdfld_dbi_dpu_report_damage(struct drm_device * dev, spin_unlock(&dpu_info->dpu_update_lock); return ret; +} + +int mdfld_dbi_dpu_report_fullscreen_damage(struct drm_device * dev) +{ + struct drm_psb_private * dev_priv; + struct mdfld_dbi_dpu_info * dpu_info; + struct mdfld_dsi_config * dsi_config; + struct psb_drm_dpu_rect rect; + int i; + + if(!dev) { + DRM_ERROR("Invalid parameter\n"); + return -EINVAL; + } + + dev_priv = dev->dev_private; + dpu_info = dev_priv ? dev_priv->dbi_dpu_info : NULL; + + if(!dpu_info) { + DRM_ERROR("No dpu info found\n"); + return -EINVAL; + } + + for(i=0; i<dpu_info->dbi_output_num; i++) { + dsi_config = dev_priv->dsi_configs[i]; + if(dsi_config) { + rect.x = rect.y = 0; + rect.width = dsi_config->fixed_mode->hdisplay; + rect.height = dsi_config->fixed_mode->vdisplay; + mdfld_dbi_dpu_report_damage(dev, + i ? (MDFLD_PLANEC) : (MDFLD_PLANEA), + &rect); + + } + } + + /*exit DSR state*/ + mdfld_dpu_exit_dsr(dev); + + return 0; } @@ -569,6 +609,7 @@ int mdfld_dpu_exit_dsr(struct drm_device * dev) struct drm_psb_private * dev_priv = dev->dev_private; struct mdfld_dbi_dpu_info * dpu_info = dev_priv->dbi_dpu_info; int i; + int pipe; dbi_output = dpu_info->dbi_outputs; @@ -584,8 +625,17 @@ int mdfld_dpu_exit_dsr(struct drm_device * dev) mdfld_dbi_dpu_timer_start(dpu_info); else { /*enable te interrupt*/ - mdfld_enable_te(dev, 0); - mdfld_enable_te(dev, 2); + for(i=0; i<dpu_info->dbi_output_num; i++) { + /*if this output is not in DSR mode, don't call exit dsr*/ + pipe = dbi_output[i]->channel_num ? 2 : 0; + if(dbi_output[i]->dbi_panel_on && pipe) { + mdfld_disable_te(dev, 0); + mdfld_enable_te(dev, 2); + } else if (dbi_output[i]->dbi_panel_on && !pipe) { + mdfld_disable_te(dev, 2); + mdfld_enable_te(dev, 0); + } + } } return 0; diff --git a/drivers/staging/mrst/drv/mdfld_dsi_dbi_dpu.h b/drivers/staging/mrst/drv/mdfld_dsi_dbi_dpu.h index f480a42..90ad579 100644 --- a/drivers/staging/mrst/drv/mdfld_dsi_dbi_dpu.h +++ b/drivers/staging/mrst/drv/mdfld_dsi_dbi_dpu.h @@ -146,9 +146,10 @@ static inline void mdfld_dpu_init_damage(struct mdfld_dbi_dpu_info * dpu_info, i } extern int mdfld_dsi_dbi_dsr_off(struct drm_device * dev, struct psb_drm_dpu_rect * rect); -extern int mdfld_dbi_dpu_report_damage(struct drm_device * dev, - mdfld_plane_t plane, - struct psb_drm_dpu_rect * rect); +extern int mdfld_dbi_dpu_report_damage(struct drm_device * dev, + mdfld_plane_t plane, + struct psb_drm_dpu_rect * rect); +extern int mdfld_dbi_dpu_report_fullscreen_damage(struct drm_device * dev); extern int mdfld_dpu_exit_dsr(struct drm_device * dev); extern void mdfld_dbi_dpu_timer_start(struct mdfld_dbi_dpu_info * dpu_info); extern int mdfld_dbi_dpu_init(struct drm_device * dev); diff --git a/drivers/staging/mrst/drv/psb_drv.c b/drivers/staging/mrst/drv/psb_drv.c index 4c0bdc3..ca0eff6 100644 --- a/drivers/staging/mrst/drv/psb_drv.c +++ b/drivers/staging/mrst/drv/psb_drv.c @@ -361,7 +361,6 @@ static int psb_hdcp_i2c_access_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); #endif -#if MDFLD_JLIU7_DSR static int psb_dpu_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); static int psb_dpu_dsr_on_ioctl(struct drm_device *dev, void *data, @@ -369,7 +368,6 @@ static int psb_dpu_dsr_on_ioctl(struct drm_device *dev, void *data, static int psb_dpu_dsr_off_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); -#endif #define PSB_IOCTL_DEF(ioctl, func, flags) \ [DRM_IOCTL_NR(ioctl) - DRM_COMMAND_BASE] = {ioctl, flags, func} @@ -460,14 +458,12 @@ static struct drm_ioctl_desc psb_ioctls[] = { DRM_AUTH) #endif -#if MDFLD_JLIU7_DSR PSB_IOCTL_DEF(DRM_IOCRL_PSB_DPU_QUERY, psb_dpu_query_ioctl, DRM_AUTH), PSB_IOCTL_DEF(DRM_IOCRL_PSB_DPU_DSR_ON, psb_dpu_dsr_on_ioctl, DRM_AUTH), PSB_IOCTL_DEF(DRM_IOCRL_PSB_DPU_DSR_OFF, psb_dpu_dsr_off_ioctl, DRM_AUTH) -#endif }; static int psb_max_ioctl = DRM_ARRAY_SIZE(psb_ioctls); @@ -1213,9 +1209,7 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset) INIT_LIST_HEAD(&dev_priv->context.validate_list); INIT_LIST_HEAD(&dev_priv->context.kern_validate_list); -#if MDFLD_JLIU7_DSR mutex_init(&dev_priv->dsr_mutex); -#endif /* MDFLD_JLIU7_DSR */ spin_lock_init(&dev_priv->reloc_lock); @@ -2050,34 +2044,38 @@ static int psb_hdcp_i2c_access_ioctl(struct drm_device *dev, void *data, } #endif -#if MDFLD_JLIU7_DSR static int psb_dpu_query_ioctl(struct drm_device *dev, void *arg, struct drm_file *file_priv) { IMG_INT *data = (IMG_INT*)arg; DRM_DRIVER_PRIVATE_T *dev_priv = dev->dev_private; + int panel_type; + /*reject requests from non-mdfld platforms*/ if(!IS_MDFLD(dev)) { DRM_INFO("Not Medfield platform! return."); return -ENOTSUPP; } + panel_type = is_panel_vid_or_cmd(dev); + + if(panel_type == MDFLD_DSI_ENCODER_DPI) { + DRM_INFO("DSI panel is working in video mode\n"); + dev_priv->b_dsr_enable = false; + *data = 0; + return 0; + } + DRM_INFO("dsr query. \n"); -#ifdef CONFIG_MDFLD_DSI_DSR +#if defined(CONFIG_MDFLD_DSI_DSR) dev_priv->b_dsr_enable = true; - -#ifdef CONFIG_MDFLD_DSI_DPU - *data = MDFLD_DSR_RR | MDFLD_DPU_ENABLE; -#else /*CONFIG_MDFLD_DSI_DPU*/ *data = MDFLD_DSR_RR | MDFLD_DSR_FULLSCREEN; -#endif /*CONFIG_MDFLD_DSI_DPU*/ - - DRM_INFO("Support DSR in kernel, flag 0x%08x\n", (u32)*data); - - -#else /*DSR was not define or in video mode*/ +#elif defined(CONFIG_MDFLD_DSI_DPU) + dev_priv->b_dsr_enable = true; + *data = MDFLD_DSR_RR | MDFLD_DPU_ENABLE; +#else /*DBI panel but DSR was not defined*/ DRM_INFO("DSR is disabled by kernel configuration.\n"); dev_priv->b_dsr_enable = false; @@ -2092,6 +2090,21 @@ static int psb_dpu_dsr_on_ioctl(struct drm_device *dev, void *arg, u32 * param = (u32 *)arg; struct drm_psb_private * dev_priv = (struct drm_psb_private *)dev->dev_private; + int panel_type; + + /*reject requests from non-mdfld platforms*/ + if(!IS_MDFLD(dev)) { + DRM_INFO("Not Medfield platform! return."); + return -ENOTSUPP; + } + + panel_type = is_panel_vid_or_cmd(dev); + + if(panel_type == MDFLD_DSI_ENCODER_DPI) { + DRM_INFO("DSI panel is working in video mode\n"); + dev_priv->b_dsr_enable = false; + return 0; + } if(!param) { DRM_ERROR("Invalid parameter\n"); @@ -2103,92 +2116,43 @@ static int psb_dpu_dsr_on_ioctl(struct drm_device *dev, void *arg, if(*param == DRM_PSB_DSR_DISABLE) { DRM_INFO("DSR is turned off\n"); dev_priv->b_dsr_enable = false; +#if defined(CONFIG_MDFLD_DSI_DPU) + mdfld_dbi_dpu_report_fullscreen_damage(dev); +#elif defined(CONFIG_MDFLD_DSI_DSR) mdfld_dsi_dbi_exit_dsr (dev, MDFLD_DSR_2D_3D); +#endif return 0; } else if(*param == DRM_PSB_DSR_ENABLE) { DRM_INFO("DSR is turned on\n"); +#if defined(CONFIG_MDFLD_DSI_DPU) || defined(CONFIG_MDFLD_DSI_DSR) dev_priv->b_dsr_enable = true; +#endif return 0; } return -EINVAL; } -#if MDFLD_JLIU7_DPU -void psb_dpu_combine_rect (struct psb_drm_dpu_rect *d_r_1, struct psb_drm_dpu_rect *d_r_2, struct psb_drm_dpu_rect *d_r_result) -{ - u32 x_new, y_new; - - d_r_result->x = d_r_1->x < d_r_2->x ? d_r_1->x : d_r_2->x; - d_r_result->y = d_r_1->y < d_r_2->y ? d_r_1->y : d_r_2->y; - - x_new = ((d_r_1->x + d_r_1->width) > (d_r_2->x + d_r_2->width) ? (d_r_1->x + d_r_1->width) : (d_r_2->x + d_r_2->width)); - y_new = ((d_r_1->y + d_r_1->height) > (d_r_2->y + d_r_2->height) ? (d_r_1->y + d_r_1->height) : (d_r_2->y + d_r_2->height)); - - d_r_result->width = x_new - d_r_result->x; - d_r_result->height = y_new - d_r_result->y; -} -#endif /* MDFLD_JLIU7_DPU */ - -#ifdef CONFIG_MDFLD_DSI_DPU static int psb_dpu_dsr_off_ioctl(struct drm_device *dev, void *arg, struct drm_file *file_priv) { +#if defined(CONFIG_MDFLD_DSI_DPU) struct drm_psb_drv_dsr_off_arg *dsr_off_arg = (struct drm_psb_drv_dsr_off_arg *) arg; struct psb_drm_dpu_rect rect = dsr_off_arg->damage_rect; - - return mdfld_dsi_dbi_dsr_off(dev, &rect); -} - -#else /*CONFIG_MDFLD_DSI_DPU*/ - -#if MDFLD_JLIU7_DPU_2 -static int psb_dpu_dsr_off_ioctl(struct drm_device *dev, void *arg, - struct drm_file *file_priv) -{ - DRM_DRIVER_PRIVATE_T *dev_priv = dev->dev_private; -#if MDFLD_JLIU7_DPU - struct drm_psb_drv_dsr_off_arg *dsr_off_arg = (struct drm_psb_drv_dsr_off_arg *) arg; - struct psb_drm_dpu_rect d_r_new = dsr_off_arg->damage_rect; - struct psb_drm_dpu_rect d_r_old = dev_priv->damage_rect_2d_3d; - - if (dev_priv->b_dpu_enable) - psb_dpu_combine_rect (&d_r_new, &d_r_old, &dev_priv->damage_rect_2d_3d); -#endif /* MDFLD_JLIU7_DPU */ + return mdfld_dsi_dbi_dsr_off(dev, &rect); +#elif defined(CONFIG_MDFLD_DSI_DSR) + struct drm_psb_private * dev_priv = + (struct drm_psb_private *)dev->dev_private; - if ((dev_priv->dsr_fb_update & MDFLD_DSR_2D_3D) != MDFLD_DSR_2D_3D) - { + if ((dev_priv->dsr_fb_update & MDFLD_DSR_2D_3D) != MDFLD_DSR_2D_3D) { mdfld_dsi_dbi_exit_dsr (dev, MDFLD_DSR_2D_3D); } return 0; -} -#else /* MDFLD_JLIU7_DPU_2 */ -static int psb_dpu_dsr_off_ioctl(struct drm_device *dev, void *arg, - struct drm_file *file_priv) -{ - DRM_DRIVER_PRIVATE_T *dev_priv = dev->dev_private; - -#if MDFLD_JLIU7_DPU - struct drm_psb_drv_dsr_off_arg *dsr_off_arg = (struct drm_psb_drv_dsr_off_arg *) arg; - struct psb_drm_dpu_rect d_r_new = dsr_off_arg->damage_rect; - struct psb_drm_dpu_rect d_r_old = dev_priv->damage_rect_2d_3d; - - if (dev_priv->b_dpu_enable) - psb_dpu_combine_rect (&d_r_new, &d_r_old, &dev_priv->damage_rect_2d_3d); -#endif /* MDFLD_JLIU7_DPU */ - - if ((dev_priv->dsr_fb_update & MDFLD_DSR_2D_3D) != MDFLD_DSR_2D_3D) - { - mdfld_dsi_dbi_exit_dsr (dev, MDFLD_DSR_2D_3D); - } - +#endif return 0; } -#endif /* MDFLD_JLIU7_DPU_2 */ -#endif -#endif /*CONFIG_MDFLD_DSI_DPU*/ static int psb_register_rw_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv) diff --git a/drivers/staging/mrst/drv/psb_drv.h b/drivers/staging/mrst/drv/psb_drv.h index b452c75..345c7f3 100644 --- a/drivers/staging/mrst/drv/psb_drv.h +++ b/drivers/staging/mrst/drv/psb_drv.h @@ -237,16 +237,7 @@ enum { #define MDFLD_PNW_A0 0x00 #define MDFLD_PNW_B0 0x04 #define MDFLD_PNW_C0 0x08 -#if 1 /* MDFLD_JLIU7_DSR */ -#if MDFLD_JLIU7_DPU_2 -#define MDFLD_DSR_2D_3D BIT0 -#define MDFLD_DSR_CURSOR (BIT2 | BIT3) -#define MDFLD_DSR_CURSOR_0 BIT2 -#define MDFLD_DSR_CURSOR_2 BIT3 -#define MDFLD_DSR_OVERLAY (BIT4 | BIT5) -#define MDFLD_DSR_OVERLAY_0 BIT4 -#define MDFLD_DSR_OVERLAY_2 BIT5 -#else /* MDFLD_JLIU7_DPU_2 */ + #define MDFLD_DSR_2D_3D_0 BIT0 #define MDFLD_DSR_2D_3D_2 BIT1 # define MDFLD_DSR_2D_3D (MDFLD_DSR_2D_3D_0 | MDFLD_DSR_2D_3D_2) @@ -254,12 +245,11 @@ enum { #define MDFLD_DSR_CURSOR_2 BIT3 #define MDFLD_DSR_OVERLAY_0 BIT4 #define MDFLD_DSR_OVERLAY_2 BIT5 -#endif /* MDFLD_JLIU7_DPU_2 */ + #define MDFLD_DSR_RR 45 #define MDFLD_DPU_ENABLE BIT31 #define MDFLD_DSR_FULLSCREEN BIT30 #define MDFLD_DSR_DELAY (DRM_HZ / MDFLD_DSR_RR) -#endif /* MDFLD_JLIU7_DSR */ #define PSB_PWR_STATE_ON 1 #define PSB_PWR_STATE_OFF 2 @@ -904,42 +894,6 @@ struct drm_psb_private { struct hotplug_state *psb_hotplug_state; pfn_vsync_handler psb_vsync_handler; -#if MDFLD_JLIU7_DPU_2 -#if MDFLD_JLIU7_DSR - struct mutex dsr_mutex; - bool b_dsr; - bool b_dsr_enable; - bool dsr_fb_update_done; - uint32_t dsr_fb_update; - uint32_t dsr_idle_count; - /* - * DSR TIMER - */ - spinlock_t dsr_lock; - struct timer_list dsr_timer; -#if MDFLD_JLIU7_DPU - bool b_dpu_enable; - struct psb_drm_dpu_rect damage_rect_2d_3d; - uint32_t offset_0; - uint32_t offset_2; - uint32_t bpp_0; - uint32_t bpp_2; - uint32_t cursor_addr_0; - uint32_t cursor_addr_2; - uint32_t cursor_cntr_0; - uint32_t cursor_cntr_2; - int cursor_0_x0; - int cursor_0_y0; - int cursor_0_x1; - int cursor_0_y1; - int cursor_2_x0; - int cursor_2_y0; - int cursor_2_x1; - int cursor_2_y1; -#endif /* MDFLD_JLIU7_DPU */ -#endif /*FIXME JLIU */ -#else /* MDFLD_JLIU7_DPU_2 */ -#if 1 /* MDFLD_JLIU7_DSR */ struct mutex dsr_mutex; bool b_dsr; bool b_dsr_enable; @@ -952,30 +906,6 @@ struct drm_psb_private { */ spinlock_t dsr_lock; struct timer_list dsr_timer; -#if MDFLD_JLIU7_DPU - bool b_dpu_enable; - bool b_cursor_update_0; - bool b_cursor_update_2; - struct psb_drm_dpu_rect damage_rect_2d_3d; - uint32_t offset_0; - uint32_t offset_2; - uint32_t bpp_0; - uint32_t bpp_2; - uint32_t cursor_addr_0; - uint32_t cursor_addr_2; - uint32_t cursor_cntr_0; - uint32_t cursor_cntr_2; - int cursor_0_x0; - int cursor_0_y0; - int cursor_0_x1; - int cursor_0_y1; - int cursor_2_x0; - int cursor_2_y0; - int cursor_2_x1; - int cursor_2_y1; -#endif /* MDFLD_JLIU7_DPU */ -#endif /*FIXME JLIU */ -#endif /* MDFLD_JLIU7_DPU_2 */ bool dsi_device_ready; @@ -1205,10 +1135,8 @@ extern void psb_watchdog_takedown(struct drm_psb_private *dev_priv); extern void psb_lid_timer_init(struct drm_psb_private *dev_priv); extern void psb_lid_timer_takedown(struct drm_psb_private *dev_priv); extern void psb_print_pagefault(struct drm_psb_private *dev_priv); -#if MDFLD_JLIU7_DSR extern void mdfld_dsr_timer_init(struct drm_psb_private * dev_priv); extern void mdfld_dsr_timer_takedown(struct drm_psb_private * dev_priv); -#endif /* MDFLD_JLIU7_DSR */ /* modesetting */ extern void psb_modeset_init(struct drm_device *dev); diff --git a/drivers/staging/mrst/drv/psb_intel_display2.c b/drivers/staging/mrst/drv/psb_intel_display2.c index 49fdcb3..fa9f5e6 100644 --- a/drivers/staging/mrst/drv/psb_intel_display2.c +++ b/drivers/staging/mrst/drv/psb_intel_display2.c @@ -122,10 +122,6 @@ static int mdfld_intel_crtc_cursor_set(struct drm_crtc *crtc, size_t size; void *bo; int ret; -#if MDFLD_JLIU7_DPU - uint32_t *cursor_addr = &dev_priv->cursor_addr_0; - uint32_t *cursor_cntr = &dev_priv->cursor_cntr_0; -#endif /* MDFLD_JLIU7_DPU */ DRM_DEBUG("\n"); @@ -139,10 +135,6 @@ static int mdfld_intel_crtc_cursor_set(struct drm_crtc *crtc, case 2: control = CURCCNTR; base = CURCBASE; -#if MDFLD_JLIU7_DPU - cursor_addr = &dev_priv->cursor_addr_2; - cursor_cntr = &dev_priv->cursor_cntr_2; -#endif /* MDFLD_JLIU7_DPU */ break; default: DRM_ERROR("Illegal Pipe Number. \n"); @@ -160,10 +152,6 @@ static int mdfld_intel_crtc_cursor_set(struct drm_crtc *crtc, temp = 0; temp |= CURSOR_MODE_DISABLE; -#if MDFLD_JLIU7_DPU - *cursor_cntr = temp; -#endif /* MDFLD_JLIU7_DPU */ - if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, OSPM_UHB_ONLY_IF_ON)) { REG_WRITE(control, temp); @@ -222,11 +210,6 @@ static int mdfld_intel_crtc_cursor_set(struct drm_crtc *crtc, temp |= (pipe << 28); temp |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE; -#if MDFLD_JLIU7_DPU - *cursor_cntr = temp; - *cursor_addr = addr; -#endif /* MDFLD_JLIU7_DPU */ - if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, OSPM_UHB_ONLY_IF_ON)) { REG_WRITE(control, temp); REG_WRITE(base, addr); @@ -246,9 +229,7 @@ static int mdfld_intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) { struct drm_device *dev = crtc->dev; #ifndef CONFIG_MDFLD_DSI_DPU -#if MDFLD_JLIU7_DSR struct drm_psb_private * dev_priv = (struct drm_psb_private *)dev->dev_private; -#endif /* MDFLD_JLIU7_DSR */ #else struct psb_drm_dpu_rect rect; #endif @@ -262,14 +243,8 @@ static int mdfld_intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) switch (pipe) { case 0: #ifndef CONFIG_MDFLD_DSI_DPU -#if MDFLD_JLIU7_DSR -#if MDFLD_JLIU7_DPU - dev_priv->cursor_0_x0 = x; - dev_priv->cursor_0_y0 = y; -#endif /* MDFLD_JLIU7_DPU */ if (!(dev_priv->dsr_fb_update & MDFLD_DSR_CURSOR_0)) mdfld_dsi_dbi_exit_dsr (dev, MDFLD_DSR_CURSOR_0); -#endif /* MDFLD_JLIU7_DSR */ #else /*CONFIG_MDFLD_DSI_DPU*/ rect.x = x; rect.y = y; @@ -284,15 +259,8 @@ static int mdfld_intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) break; case 2: #ifndef CONFIG_MDFLD_DSI_DPU -#if MDFLD_JLIU7_DSR -#if MDFLD_JLIU7_DPU - dev_priv->cursor_2_x0 = x; - dev_priv->cursor_2_y0 = y; -#endif /* MDFLD_JLIU7_DPU */ if (!(dev_priv->dsr_fb_update & MDFLD_DSR_CURSOR_2)) mdfld_dsi_dbi_exit_dsr (dev, MDFLD_DSR_CURSOR_2); -#endif /* MDFLD_JLIU7_DSR */ - #else /*CONFIG_MDFLD_DSI_DPU*/ mdfld_dbi_dpu_report_damage(dev, MDFLD_CURSORC, &rect); mdfld_dpu_exit_dsr(dev); @@ -305,10 +273,6 @@ static int mdfld_intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) return -EINVAL; } -#if MDFLD_JLIU7_DPU - if (pipe != 1) - return 0; -#endif /* MDFLD_JLIU7_DPU */ #if 1 /* FIXME_JLIU7 can't enalbe cursorB/C HW issue. need to remove after HW fix */ if (pipe != 0) return 0; @@ -364,11 +328,6 @@ int mdfld__intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, struct drm_f int dspcntr_reg = DSPACNTR; u32 dspcntr; int ret = 0; -#if MDFLD_JLIU7_DPU - DRM_DRIVER_PRIVATE_T *dev_priv = dev->dev_private; - u32 *p_offset = &dev_priv->offset_0; - u32 *p_bpp = &dev_priv->bpp_0; -#endif /* MDFLD_JLIU7_DPU */ PSB_DEBUG_ENTRY("pipe = 0x%x. \n", pipe); @@ -396,10 +355,6 @@ int mdfld__intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, struct drm_f dspsurf = DSPCSURF; dspstride = DSPCSTRIDE; dspcntr_reg = DSPCCNTR; -#if MDFLD_JLIU7_DPU - p_offset = &dev_priv->offset_2; - p_bpp = &dev_priv->bpp_2; -#endif /* MDFLD_JLIU7_DPU */ break; default: DRM_ERROR("Illegal Pipe Number. \n"); @@ -412,10 +367,6 @@ int mdfld__intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, struct drm_f Start = mode_dev->bo_offset(dev, psbfb); Offset = y * crtc->fb->pitch + x * (crtc->fb->bits_per_pixel / 8); -#if MDFLD_JLIU7_DPU - *p_offset = Offset; - *p_bpp = crtc->fb->bits_per_pixel / 8; -#endif /* MDFLD_JLIU7_DPU */ REG_WRITE(dspstride, crtc->fb->pitch); dspcntr = REG_READ(dspcntr_reg); @@ -1330,20 +1281,13 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc, fp = 0x000000d2; #endif } else { -#if DBI_TPO_480x864 /* get from spec. */ +#if 0 /*DBI_TPO_480x864*/ dpll = 0x00020000; fp = 0x00000156; #endif /* DBI_TPO_480x864 */ /* get from spec. */ -#if DBI_TPO_864x480 || DSI_TPO_864x480 /* get from spec. */ dpll = 0x00800000; fp = 0x000000c1; -#endif /* DBI_TPO_864x480 */ /* get from spec. */ - -#if 0 /* single dpi DSI_TPO_864x480 */ /* get from spec. */ - dpll = 0x00800000; - fp = 0x00000044; -#endif /* DBI_TPO_864x480 */ /* get from spec. */ } REG_WRITE(fp_reg, fp); diff --git a/drivers/staging/mrst/drv/psb_intel_drv.h b/drivers/staging/mrst/drv/psb_intel_drv.h index 92fe1e0..4523b87 100644 --- a/drivers/staging/mrst/drv/psb_intel_drv.h +++ b/drivers/staging/mrst/drv/psb_intel_drv.h @@ -39,34 +39,6 @@ #define MDFLD_GET_SYNC_BURST 0 /* Consider BURST_MODE when calcaulation H/V sync counts */ /* MDFLD FEATURE SWITCHES*/ /* MDFLD MIPI panels only one of them can be set to 1 */ -#ifdef CONFIG_MDFD_COMMAND_MODE -/* MDFLD DSR SWITCHES*/ -#define MDFLD_JLIU7_DSR 1 /* have to be enable all the time. */ -#define MDFLD_JLIU7_DPU 0 -#define MDFLD_JLIU7_DPU_2 0 -#define DBI_TPO_480x864 0 /* TPO DBI 4.8 MIPI panel */ -#define DBI_TPO_864x480 1 /* TPO DBI 4.8 MIPI panel */ -#define DSI_TPO_864x480 0 /* TPO DBI 4.8 MIPI panel */ -#else -/* MDFLD DSR SWITCHES*/ -#define MDFLD_JLIU7_DSR 0 -#define MDFLD_JLIU7_DPU 0 -#define MDFLD_JLIU7_DPU_2 0 -#define DBI_TPO_480x864 0 /* TPO DBI 4.8 MIPI panel */ -#define DBI_TPO_864x480 0 /* TPO DBI 4.8 MIPI panel */ -#define DSI_TPO_864x480 1 /* TPO DBI 4.8 MIPI panel */ -#endif - -#ifdef CONFIG_MDFD_COMMAND_MODE_2 -/* 2nd MIPI Panel type */ -#define DBI_TPO_480x864_2 0 /* TPO DBI 4.8 MIPI panel */ -#define DBI_TPO_864x480_2 1 /* TPO DBI 4.8 MIPI panel */ -#define DSI_TPO_864x480_2 0 /* TPO DBI 4.8 MIPI panel */ -#else -#define DBI_TPO_480x864_2 0 /* TPO DBI 4.8 MIPI panel */ -#define DBI_TPO_864x480_2 0 /* TPO DBI 4.8 MIPI panel */ -#define DSI_TPO_864x480_2 1 /* TPO DBI 4.8 MIPI panel */ -#endif /* MDFLD KSEL only one of them can be set to 1 */ #define KSEL_CRYSTAL_19_ENABLED 1 @@ -306,15 +278,9 @@ extern void psb_intel_lvds_destroy(struct drm_connector *connector); extern const struct drm_encoder_funcs psb_intel_lvds_enc_funcs; extern void mdfld_disable_crtc (struct drm_device *dev, int pipe); -#if MDFLD_JLIU7_DSR -#if MDFLD_JLIU7_DPU_2 -extern void mdfld_dbi_update_fb (struct drm_device *dev); -#else /* MDFLD_JLIU7_DPU_2 */ extern void mdfld_dbi_update_fb (struct drm_device *dev, int pipe); -#endif /* MDFLD_JLIU7_DPU_2 */ extern void mdfld_dbi_enter_dsr (struct drm_device *dev); extern void mdfld_dbi_exit_dsr (struct drm_device *dev, u32 update_src); -#endif /* MDFLD_JLIU7_DSR */ extern void mdfld_dbi_update_panel (struct drm_device *dev, int pipe); extern void mdfld_dsi_brightness_control (struct drm_device *dev, int pipe, int level); extern void mdfld_dsi_gen_fifo_ready (struct drm_device *dev, u32 gen_fifo_stat_reg, u32 fifo_stat); diff --git a/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_mrst/mrstlfb_linux.c b/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_mrst/mrstlfb_linux.c index 8c62d1f..0874a94 100644 --- a/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_mrst/mrstlfb_linux.c +++ b/drivers/staging/mrst/pvr/services4/3rdparty/linux_framebuffer_mrst/mrstlfb_linux.c @@ -51,6 +51,7 @@ #include "psb_drv.h" #include "mdfld_dsi_dbi.h" +#include "mdfld_dsi_dbi_dpu.h" #if !defined(SUPPORT_DRI_DRM) #error "SUPPORT_DRI_DRM must be set" @@ -157,6 +158,9 @@ void MRSTLFBFlipToSurface(MRSTLFB_DEVINFO *psDevInfo, unsigned long uiAddr) { int dspbase = (psDevInfo->ui32MainPipe == 0 ? DSPABASE : DSPBBASE); int dspsurf = (psDevInfo->ui32MainPipe == 0 ? DSPASURF : DSPBSURF); + int panel_type; + + panel_type = is_panel_vid_or_cmd(psDevInfo->psDrmDevice); if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, true)) { @@ -169,9 +173,15 @@ void MRSTLFBFlipToSurface(MRSTLFB_DEVINFO *psDevInfo, unsigned long uiAddr) dspsurf = DSPCSURF; MRSTLFBVSyncWriteReg(psDevInfo, dspsurf, uiAddr); #endif - /*if in DSR mode, exit it!*/ - mdfld_dsi_dbi_exit_dsr (psDevInfo->psDrmDevice, MDFLD_DSR_2D_3D); + if(panel_type == MDFLD_DSI_ENCODER_DBI) { +#if defined(CONFIG_MDFLD_DSI_DPU) + mdfld_dbi_dpu_report_fullscreen_damage(psDevInfo->psDrmDevice); +#elif defined(CONFIG_MDFLD_DSI_DSR) + /*if in DSR mode, exit it!*/ + mdfld_dsi_dbi_exit_dsr (psDevInfo->psDrmDevice, MDFLD_DSR_2D_3D); +#endif + } /*TODO: Add plane B flip here*/ } else { MRSTLFBVSyncWriteReg(psDevInfo, dspbase, uiAddr); -- 1.7.1 _______________________________________________ MeeGo-kernel mailing list [email protected] http://lists.meego.com/listinfo/meego-kernel
