The quirk definition of (1<<31) is used to workaround another issue on MRST platform. But unfortunately it is an incorrect definition, which will cause that the high 32-bit of quirk varible is extended as 0xFFFFFFF. Then it will fall into the workaround for Medfield(The high-speed clock mode is disabled for SD host controller. In such case the SD card will have to work in the low-speed mode.
Signed-off-by: Zhao Yakui <[email protected]> Signed-off-by: Huang Hang <[email protected]> --- include/linux/mmc/sdhci.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Index: linux-2.6.35.3/include/linux/mmc/sdhci.h =================================================================== --- linux-2.6.35.3.orig/include/linux/mmc/sdhci.h +++ linux-2.6.35.3/include/linux/mmc/sdhci.h @@ -85,7 +85,7 @@ struct sdhci_host { #define SDHCI_QUIRK_NO_HISPD_BIT (1<<29) #define SDHCI_QUIRK_FORCE_FULL_SPEED_MODE (1<<30) /* Controller has an issue with software reset all function */ -#define SDHCI_QUIRK_BROKEN_RESETALL (1<<31) +#define SDHCI_QUIRK_BROKEN_RESETALL (1ULL<<31) /* Controller has an issue when its two slots enabled together */ #define SDHCI_QUIRK_SERIALIZE (1ULL<<32) /* Controller of Medfield specific restriction */ _______________________________________________ MeeGo-kernel mailing list [email protected] http://lists.meego.com/listinfo/meego-kernel
