Re: Mersenne: Celerons

[John R Pierce]

> ?? Can you fit dual Celerons in a decent BX/GX M/B "designed" for dual PIIs?
> (In other words does the Celeron support SMP)

the celeron's have the SMB disabled.  Rumor has it you can hack them by
cutting and jumping traces, but, uhhhhhh.

also, the smaller cache size would be a larger disadvantage when multiple
CPU's have to contend for main memory.

-jrp