On Wed, 29 Nov 2000, Guillermo Ballester Valor wrote:
> Today, I've read in the manuals that a simple integer add with carry
> (addc) has 8 clocks of latency and 3 clocks of throughput for a P4.
> Humm, too much slowdown for single Ia32 instructions, Intel engineers
> will know the reasons.
This and the 14-18 clock multiply are extremely depressing. For all the
marketing hype about Intel catering to the internet and the next
generation of "active media", they're making it awfully difficult to
implement the cryptography that the internet needs.
The alpha was already at least 5x faster than a PIII for multiprecision
arithmetic at the same clock speed; with the P4 it will only get worse.
jasonp
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