Module: Mesa
Branch: master
Commit: e4e393a65c0dd3002d28850ea43c055caae95537
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e4e393a65c0dd3002d28850ea43c055caae95537

Author: Eric Anholt <[email protected]>
Date:   Wed Mar 17 09:45:07 2021 -0700

freedreno/a6xx: Disable sample averaging on depth/stencil resolves.

From the GLES 3.2 spec:

"If the source formats are integer types or stencil values, a single
sample’s value is selected for each pixel. If the source formats are
floating-point or normalized types, the sample values for each pixel are
resolved in an implementation-dependent manner. If the source formats are
depth values, sample values are resolved in an implementation-dependent
manner where the result will be between the minimum and maximum depth
values in the pixel."

For Z24S8 we were doing an average, which would be invalid for the stencil
data, and apparently the CTS didn't catch that.  For Z32F, our averaging
was technically legal, but given the Vulkan spec's requirement of sample 0
support but not sample average support for depth and stencil resolves, it
suggests that our averaging behavior was unusual.  Let's not spend power
on producing surprising results.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9661>

---

 src/gallium/drivers/freedreno/a6xx/fd6_gmem.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c 
b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
index 0019a55c5e2..43be406d98c 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
@@ -1255,7 +1255,7 @@ emit_resolve_blit(struct fd_batch *batch,
                break;
        }
 
-       if (util_format_is_pure_integer(psurf->format))
+       if (util_format_is_pure_integer(psurf->format) || 
util_format_is_depth_or_stencil(psurf->format))
                info |= A6XX_RB_BLIT_INFO_SAMPLE_0;
 
        OUT_PKT4(ring, REG_A6XX_RB_BLIT_INFO, 1);

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