Module: Mesa Branch: main Commit: 8f9006804aa6552b6f0eff56ffe9810f66cd18bb URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8f9006804aa6552b6f0eff56ffe9810f66cd18bb
Author: Dave Airlie <[email protected]> Date: Mon Nov 15 09:07:48 2021 +1000 intel/genxml: fix gen6 LD->VLD typo. Pointed out by Ilia Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13788> --- src/intel/genxml/gen6.xml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml index a2736dbd6e1..6d41141d674 100644 --- a/src/intel/genxml/gen6.xml +++ b/src/intel/genxml/gen6.xml @@ -2162,7 +2162,7 @@ <field name="Post Deblocking Output Enable" start="41" end="41" type="bool"/> <field name="Stream-Out Enable" start="42" end="42" type="bool"/> <field name="Decoder Mode Select" start="48" end="48" type="uint"> - <value name="LD Mode" value="0"/> + <value name="VLD Mode" value="0"/> <value name="IT Mode" value="1"/> </field> <field name="AVC ILDB Boundary Strength Calculation" start="64" end="64" type="uint">
