Module: Mesa Branch: main Commit: 71a50bdaadeae6530ba5d19c33afa2317c04ced9 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=71a50bdaadeae6530ba5d19c33afa2317c04ced9
Author: Bas Nieuwenhuizen <[email protected]> Date: Mon Mar 13 02:09:17 2023 +0100 ac/surface,radv: Avoid pitch weirdness if image not used for rendertarget. Literally no point to it. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21869> --- src/amd/common/ac_surface.c | 4 +++- src/amd/vulkan/radv_image.c | 8 +++++++- src/amd/vulkan/radv_meta_copy.c | 4 ++++ src/amd/vulkan/radv_meta_resolve.c | 3 ++- 4 files changed, 16 insertions(+), 3 deletions(-) diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c index 2fa029900ad..2b318b52826 100644 --- a/src/amd/common/ac_surface.c +++ b/src/amd/common/ac_surface.c @@ -1132,7 +1132,9 @@ static int gfx6_compute_surface(ADDR_HANDLE addrlib, const struct radeon_info *i !compressed && ((config->info.array_size == 1 && config->info.depth == 1) || config->info.levels == 1); - AddrSurfInfoIn.flags.noStencil = (surf->flags & RADEON_SURF_SBUFFER) == 0; + AddrSurfInfoIn.flags.noStencil = + !(surf->flags & RADEON_SURF_SBUFFER) || (surf->flags & RADEON_SURF_NO_RENDER_TARGET); + AddrSurfInfoIn.flags.compressZ = !!(surf->flags & RADEON_SURF_Z_OR_SBUFFER); /* On GFX7-GFX8, the DB uses the same pitch and tile mode (except tilesplit) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index bf3c7a3b474..d5f949957f8 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -624,8 +624,14 @@ radv_get_surface_flags(struct radv_device *device, struct radv_image *image, uns if (is_depth) { flags |= RADEON_SURF_ZBUFFER; + if (is_depth && is_stencil && + !(pCreateInfo->usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT) && + device->physical_device->rad_info.gfx_level <= GFX8) + flags |= RADEON_SURF_NO_RENDER_TARGET; + if (radv_use_htile_for_image(device, image) && - !(device->instance->debug_flags & RADV_DEBUG_NO_HIZ)) { + !(device->instance->debug_flags & RADV_DEBUG_NO_HIZ) && + !(flags & RADEON_SURF_NO_RENDER_TARGET)) { if (radv_use_tc_compat_htile_for_image(device, pCreateInfo, image_format)) flags |= RADEON_SURF_TC_COMPATIBLE_HTILE; } else { diff --git a/src/amd/vulkan/radv_meta_copy.c b/src/amd/vulkan/radv_meta_copy.c index 4f598c59a2c..1d665531cfc 100644 --- a/src/amd/vulkan/radv_meta_copy.c +++ b/src/amd/vulkan/radv_meta_copy.c @@ -81,6 +81,10 @@ radv_image_is_renderable(struct radv_device *device, struct radv_image *image) vk_format_get_blocksizebits(image->vk.format) == 128 && vk_format_is_compressed(image->vk.format)) return false; + + if (image->planes[0].surface.flags & RADEON_SURF_NO_RENDER_TARGET) + return false; + return true; } diff --git a/src/amd/vulkan/radv_meta_resolve.c b/src/amd/vulkan/radv_meta_resolve.c index 947afdef83f..b43c34c01a6 100644 --- a/src/amd/vulkan/radv_meta_resolve.c +++ b/src/amd/vulkan/radv_meta_resolve.c @@ -304,7 +304,8 @@ radv_pick_resolve_method_images(struct radv_device *device, struct radv_image *s else if (src_image->info.array_size > 1 || dest_image->info.array_size > 1) *method = RESOLVE_COMPUTE; } else { - if (src_image->info.array_size > 1 || dest_image->info.array_size > 1) + if (src_image->info.array_size > 1 || dest_image->info.array_size > 1 || + (dest_image->planes[0].surface.flags & RADEON_SURF_NO_RENDER_TARGET)) *method = RESOLVE_COMPUTE; else *method = RESOLVE_FRAGMENT;
