Module: Mesa Branch: main Commit: 76698f3abd7a42ec64c3b03792069b18fdc3c7ef URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=76698f3abd7a42ec64c3b03792069b18fdc3c7ef
Author: Lionel Landwerlin <[email protected]> Date: Fri Mar 17 10:38:11 2023 +0200 intel/fs: copy instruction sources in logical send lowering Having references to inst->src[X] when you're also modifying inst->src[X] is a receipe for disaster. Making changes to the lowering code I've been bitten quite a few times by this take copies of all sources to do the lowering. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21853> --- src/intel/compiler/brw_lower_logical_sends.cpp | 94 +++++++++++++------------- 1 file changed, 47 insertions(+), 47 deletions(-) diff --git a/src/intel/compiler/brw_lower_logical_sends.cpp b/src/intel/compiler/brw_lower_logical_sends.cpp index bac234e6dd4..f79cccd403d 100644 --- a/src/intel/compiler/brw_lower_logical_sends.cpp +++ b/src/intel/compiler/brw_lower_logical_sends.cpp @@ -155,12 +155,12 @@ lower_fb_write_logical_send(const fs_builder &bld, fs_inst *inst, { assert(inst->src[FB_WRITE_LOGICAL_SRC_COMPONENTS].file == IMM); const intel_device_info *devinfo = bld.shader->devinfo; - const fs_reg &color0 = inst->src[FB_WRITE_LOGICAL_SRC_COLOR0]; - const fs_reg &color1 = inst->src[FB_WRITE_LOGICAL_SRC_COLOR1]; - const fs_reg &src0_alpha = inst->src[FB_WRITE_LOGICAL_SRC_SRC0_ALPHA]; - const fs_reg &src_depth = inst->src[FB_WRITE_LOGICAL_SRC_SRC_DEPTH]; - const fs_reg &dst_depth = inst->src[FB_WRITE_LOGICAL_SRC_DST_DEPTH]; - const fs_reg &src_stencil = inst->src[FB_WRITE_LOGICAL_SRC_SRC_STENCIL]; + const fs_reg color0 = inst->src[FB_WRITE_LOGICAL_SRC_COLOR0]; + const fs_reg color1 = inst->src[FB_WRITE_LOGICAL_SRC_COLOR1]; + const fs_reg src0_alpha = inst->src[FB_WRITE_LOGICAL_SRC_SRC0_ALPHA]; + const fs_reg src_depth = inst->src[FB_WRITE_LOGICAL_SRC_SRC_DEPTH]; + const fs_reg dst_depth = inst->src[FB_WRITE_LOGICAL_SRC_DST_DEPTH]; + const fs_reg src_stencil = inst->src[FB_WRITE_LOGICAL_SRC_SRC_STENCIL]; fs_reg sample_mask = inst->src[FB_WRITE_LOGICAL_SRC_OMASK]; const unsigned components = inst->src[FB_WRITE_LOGICAL_SRC_COMPONENTS].ud; @@ -1260,18 +1260,18 @@ static void lower_sampler_logical_send(const fs_builder &bld, fs_inst *inst, opcode op) { const intel_device_info *devinfo = bld.shader->devinfo; - const fs_reg &coordinate = inst->src[TEX_LOGICAL_SRC_COORDINATE]; - const fs_reg &shadow_c = inst->src[TEX_LOGICAL_SRC_SHADOW_C]; - const fs_reg &lod = inst->src[TEX_LOGICAL_SRC_LOD]; - const fs_reg &lod2 = inst->src[TEX_LOGICAL_SRC_LOD2]; - const fs_reg &min_lod = inst->src[TEX_LOGICAL_SRC_MIN_LOD]; - const fs_reg &sample_index = inst->src[TEX_LOGICAL_SRC_SAMPLE_INDEX]; - const fs_reg &mcs = inst->src[TEX_LOGICAL_SRC_MCS]; - const fs_reg &surface = inst->src[TEX_LOGICAL_SRC_SURFACE]; - const fs_reg &sampler = inst->src[TEX_LOGICAL_SRC_SAMPLER]; - const fs_reg &surface_handle = inst->src[TEX_LOGICAL_SRC_SURFACE_HANDLE]; - const fs_reg &sampler_handle = inst->src[TEX_LOGICAL_SRC_SAMPLER_HANDLE]; - const fs_reg &tg4_offset = inst->src[TEX_LOGICAL_SRC_TG4_OFFSET]; + const fs_reg coordinate = inst->src[TEX_LOGICAL_SRC_COORDINATE]; + const fs_reg shadow_c = inst->src[TEX_LOGICAL_SRC_SHADOW_C]; + const fs_reg lod = inst->src[TEX_LOGICAL_SRC_LOD]; + const fs_reg lod2 = inst->src[TEX_LOGICAL_SRC_LOD2]; + const fs_reg min_lod = inst->src[TEX_LOGICAL_SRC_MIN_LOD]; + const fs_reg sample_index = inst->src[TEX_LOGICAL_SRC_SAMPLE_INDEX]; + const fs_reg mcs = inst->src[TEX_LOGICAL_SRC_MCS]; + const fs_reg surface = inst->src[TEX_LOGICAL_SRC_SURFACE]; + const fs_reg sampler = inst->src[TEX_LOGICAL_SRC_SAMPLER]; + const fs_reg surface_handle = inst->src[TEX_LOGICAL_SRC_SURFACE_HANDLE]; + const fs_reg sampler_handle = inst->src[TEX_LOGICAL_SRC_SAMPLER_HANDLE]; + const fs_reg tg4_offset = inst->src[TEX_LOGICAL_SRC_TG4_OFFSET]; assert(inst->src[TEX_LOGICAL_SRC_COORD_COMPONENTS].file == IMM); const unsigned coord_components = inst->src[TEX_LOGICAL_SRC_COORD_COMPONENTS].ud; assert(inst->src[TEX_LOGICAL_SRC_GRAD_COMPONENTS].file == IMM); @@ -1378,13 +1378,13 @@ lower_surface_logical_send(const fs_builder &bld, fs_inst *inst) const intel_device_info *devinfo = bld.shader->devinfo; /* Get the logical send arguments. */ - const fs_reg &addr = inst->src[SURFACE_LOGICAL_SRC_ADDRESS]; - const fs_reg &src = inst->src[SURFACE_LOGICAL_SRC_DATA]; - const fs_reg &surface = inst->src[SURFACE_LOGICAL_SRC_SURFACE]; - const fs_reg &surface_handle = inst->src[SURFACE_LOGICAL_SRC_SURFACE_HANDLE]; - const UNUSED fs_reg &dims = inst->src[SURFACE_LOGICAL_SRC_IMM_DIMS]; - const fs_reg &arg = inst->src[SURFACE_LOGICAL_SRC_IMM_ARG]; - const fs_reg &allow_sample_mask = + const fs_reg addr = inst->src[SURFACE_LOGICAL_SRC_ADDRESS]; + const fs_reg src = inst->src[SURFACE_LOGICAL_SRC_DATA]; + const fs_reg surface = inst->src[SURFACE_LOGICAL_SRC_SURFACE]; + const fs_reg surface_handle = inst->src[SURFACE_LOGICAL_SRC_SURFACE_HANDLE]; + const UNUSED fs_reg dims = inst->src[SURFACE_LOGICAL_SRC_IMM_DIMS]; + const fs_reg arg = inst->src[SURFACE_LOGICAL_SRC_IMM_ARG]; + const fs_reg allow_sample_mask = inst->src[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK]; assert(arg.file == IMM); assert(allow_sample_mask.file == IMM); @@ -1642,7 +1642,7 @@ lower_lsc_surface_logical_send(const fs_builder &bld, fs_inst *inst) const fs_reg src = inst->src[SURFACE_LOGICAL_SRC_DATA]; const fs_reg surface = inst->src[SURFACE_LOGICAL_SRC_SURFACE]; const fs_reg surface_handle = inst->src[SURFACE_LOGICAL_SRC_SURFACE_HANDLE]; - const UNUSED fs_reg &dims = inst->src[SURFACE_LOGICAL_SRC_IMM_DIMS]; + const UNUSED fs_reg dims = inst->src[SURFACE_LOGICAL_SRC_IMM_DIMS]; const fs_reg arg = inst->src[SURFACE_LOGICAL_SRC_IMM_ARG]; const fs_reg allow_sample_mask = inst->src[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK]; @@ -1805,11 +1805,11 @@ lower_lsc_block_logical_send(const fs_builder &bld, fs_inst *inst) assert(devinfo->has_lsc); /* Get the logical send arguments. */ - const fs_reg &addr = inst->src[SURFACE_LOGICAL_SRC_ADDRESS]; - const fs_reg &src = inst->src[SURFACE_LOGICAL_SRC_DATA]; - const fs_reg &surface = inst->src[SURFACE_LOGICAL_SRC_SURFACE]; - const fs_reg &surface_handle = inst->src[SURFACE_LOGICAL_SRC_SURFACE_HANDLE]; - const fs_reg &arg = inst->src[SURFACE_LOGICAL_SRC_IMM_ARG]; + const fs_reg addr = inst->src[SURFACE_LOGICAL_SRC_ADDRESS]; + const fs_reg src = inst->src[SURFACE_LOGICAL_SRC_DATA]; + const fs_reg surface = inst->src[SURFACE_LOGICAL_SRC_SURFACE]; + const fs_reg surface_handle = inst->src[SURFACE_LOGICAL_SRC_SURFACE_HANDLE]; + const fs_reg arg = inst->src[SURFACE_LOGICAL_SRC_IMM_ARG]; assert(arg.file == IMM); assert(inst->src[SURFACE_LOGICAL_SRC_IMM_DIMS].file == BAD_FILE); assert(inst->src[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK].file == BAD_FILE); @@ -1878,11 +1878,11 @@ lower_surface_block_logical_send(const fs_builder &bld, fs_inst *inst) assert(devinfo->ver >= 9); /* Get the logical send arguments. */ - const fs_reg &addr = inst->src[SURFACE_LOGICAL_SRC_ADDRESS]; - const fs_reg &src = inst->src[SURFACE_LOGICAL_SRC_DATA]; - const fs_reg &surface = inst->src[SURFACE_LOGICAL_SRC_SURFACE]; - const fs_reg &surface_handle = inst->src[SURFACE_LOGICAL_SRC_SURFACE_HANDLE]; - const fs_reg &arg = inst->src[SURFACE_LOGICAL_SRC_IMM_ARG]; + const fs_reg addr = inst->src[SURFACE_LOGICAL_SRC_ADDRESS]; + const fs_reg src = inst->src[SURFACE_LOGICAL_SRC_DATA]; + const fs_reg surface = inst->src[SURFACE_LOGICAL_SRC_SURFACE]; + const fs_reg surface_handle = inst->src[SURFACE_LOGICAL_SRC_SURFACE_HANDLE]; + const fs_reg arg = inst->src[SURFACE_LOGICAL_SRC_IMM_ARG]; assert(arg.file == IMM); assert(inst->src[SURFACE_LOGICAL_SRC_IMM_DIMS].file == BAD_FILE); assert(inst->src[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK].file == BAD_FILE); @@ -1993,8 +1993,8 @@ lower_lsc_a64_logical_send(const fs_builder &bld, fs_inst *inst) const intel_device_info *devinfo = bld.shader->devinfo; /* Get the logical send arguments. */ - const fs_reg &addr = inst->src[A64_LOGICAL_ADDRESS]; - const fs_reg &src = inst->src[A64_LOGICAL_SRC]; + const fs_reg addr = inst->src[A64_LOGICAL_ADDRESS]; + const fs_reg src = inst->src[A64_LOGICAL_SRC]; const unsigned src_sz = type_sz(src.type); const unsigned dst_sz = type_sz(inst->dst.type); @@ -2123,8 +2123,8 @@ lower_a64_logical_send(const fs_builder &bld, fs_inst *inst) { const intel_device_info *devinfo = bld.shader->devinfo; - const fs_reg &addr = inst->src[A64_LOGICAL_ADDRESS]; - const fs_reg &src = inst->src[A64_LOGICAL_SRC]; + const fs_reg addr = inst->src[A64_LOGICAL_ADDRESS]; + const fs_reg src = inst->src[A64_LOGICAL_SRC]; const unsigned src_comps = inst->components_read(1); assert(inst->src[A64_LOGICAL_ARG].file == IMM); const unsigned arg = inst->src[A64_LOGICAL_ARG].ud; @@ -2535,7 +2535,7 @@ lower_btd_logical_send(const fs_builder &bld, fs_inst *inst) { const intel_device_info *devinfo = bld.shader->devinfo; fs_reg global_addr = inst->src[0]; - const fs_reg &btd_record = inst->src[1]; + const fs_reg btd_record = inst->src[1]; const unsigned mlen = 2; const fs_builder ubld = bld.exec_all().group(8, 0); @@ -2612,17 +2612,17 @@ lower_trace_ray_logical_send(const fs_builder &bld, fs_inst *inst) */ fs_reg globals_addr = retype(inst->src[RT_LOGICAL_SRC_GLOBALS], BRW_REGISTER_TYPE_UD); globals_addr.stride = 1; - const fs_reg &bvh_level = + const fs_reg bvh_level = inst->src[RT_LOGICAL_SRC_BVH_LEVEL].file == BRW_IMMEDIATE_VALUE ? inst->src[RT_LOGICAL_SRC_BVH_LEVEL] : bld.move_to_vgrf(inst->src[RT_LOGICAL_SRC_BVH_LEVEL], inst->components_read(RT_LOGICAL_SRC_BVH_LEVEL)); - const fs_reg &trace_ray_control = + const fs_reg trace_ray_control = inst->src[RT_LOGICAL_SRC_TRACE_RAY_CONTROL].file == BRW_IMMEDIATE_VALUE ? inst->src[RT_LOGICAL_SRC_TRACE_RAY_CONTROL] : bld.move_to_vgrf(inst->src[RT_LOGICAL_SRC_TRACE_RAY_CONTROL], inst->components_read(RT_LOGICAL_SRC_TRACE_RAY_CONTROL)); - const fs_reg &synchronous_src = inst->src[RT_LOGICAL_SRC_SYNCHRONOUS]; + const fs_reg synchronous_src = inst->src[RT_LOGICAL_SRC_SYNCHRONOUS]; assert(synchronous_src.file == BRW_IMMEDIATE_VALUE); const bool synchronous = synchronous_src.ud; @@ -2893,9 +2893,9 @@ fs_visitor::lower_uniform_pull_constant_loads() if (inst->opcode != FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD) continue; - const fs_reg& surface = inst->src[PULL_UNIFORM_CONSTANT_SRC_SURFACE]; - const fs_reg& offset_B = inst->src[PULL_UNIFORM_CONSTANT_SRC_OFFSET]; - const fs_reg& size_B = inst->src[PULL_UNIFORM_CONSTANT_SRC_SIZE]; + const fs_reg surface = inst->src[PULL_UNIFORM_CONSTANT_SRC_SURFACE]; + const fs_reg offset_B = inst->src[PULL_UNIFORM_CONSTANT_SRC_OFFSET]; + const fs_reg size_B = inst->src[PULL_UNIFORM_CONSTANT_SRC_SIZE]; assert(offset_B.file == IMM); assert(size_B.file == IMM);
