Module: Mesa Branch: main Commit: e930ad6017ac2ce04f2dc4521bd1139ba4d1ebb1 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e930ad6017ac2ce04f2dc4521bd1139ba4d1ebb1
Author: Nanley Chery <[email protected]> Date: Fri Apr 14 13:10:54 2023 -0700 anv: Enable MCS init with ISL_AUX_OP_AMBIGUATE Up until now, we have been initializing MCS with fast clears. This is mostly safe, but there's a corner case that can be an issue. The issue is with a workaround for MCS that requires the sampler not see any fast-cleared blocks for certain surfaces (14013111325). Even though we have been initializing MCS with fast clears, we expect most applications to be safe because we expect that they would only sample the samples they've rendered to previously (and the render would've removed the fast-cleared blocks). In other words we don't expect that apps would transition from VK_IMAGE_LAYOUT_UNDEFINED to VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL and start sampling immediately. If an application took the unexpected path of sampling undefined samples, it's possible they'd hit the issue described in the workaround. Fix this corner case by using an ambiguate to initialize MCS. Reviewed-by: Ivan Briano <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22545> --- src/intel/vulkan/anv_blorp.c | 4 +++- src/intel/vulkan/genX_cmd_buffer.c | 7 ++++--- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c index 9e941fecaf7..c59672925f4 100644 --- a/src/intel/vulkan/anv_blorp.c +++ b/src/intel/vulkan/anv_blorp.c @@ -1349,8 +1349,10 @@ exec_mcs_op(struct anv_cmd_buffer *cmd_buffer, blorp_mcs_partial_resolve(batch, &surf, format, base_layer, layer_count); break; - case ISL_AUX_OP_FULL_RESOLVE: case ISL_AUX_OP_AMBIGUATE: + blorp_mcs_ambiguate(batch, &surf, base_layer, layer_count); + break; + case ISL_AUX_OP_FULL_RESOLVE: default: unreachable("Unsupported MCS operation"); } diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index c15b62dd809..3fa7a61c1c4 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -1096,8 +1096,9 @@ transition_color_buffer(struct anv_cmd_buffer *cmd_buffer, * with the MCS referring to an invalid plane because not all bits of * the MCS value are actually used. Even though we've never seen issues * in the wild, it's best to play it safe and initialize the MCS. We - * can use a fast-clear for MCS because we only ever touch from render - * and texture (no image load store). + * could use a fast-clear for MCS because we only ever touch from render + * and texture (no image load store). However, due to WA 14013111325, + * we choose to ambiguate MCS as well. */ if (image->vk.samples == 1) { for (uint32_t l = 0; l < level_count; l++) { @@ -1144,7 +1145,7 @@ transition_color_buffer(struct anv_cmd_buffer *cmd_buffer, image->planes[plane].primary_surface.isl.format, ISL_SWIZZLE_IDENTITY, aspect, base_layer, layer_count, - ISL_AUX_OP_FAST_CLEAR, NULL, false); + ISL_AUX_OP_AMBIGUATE, NULL, false); } return; }
