Module: Mesa Branch: main Commit: dbf6f0291afe3c2cbb600abbc5bdb9697d743459 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=dbf6f0291afe3c2cbb600abbc5bdb9697d743459
Author: Sviatoslav Peleshko <sviatoslav.peles...@globallogic.com> Date: Wed Oct 11 11:44:14 2023 +0300 intel/fs: Set group 0 for Wa_14010017096 MOV instruction We always set exec size to 16 for this MOV, but the execution group remains from the previous emitted instruction. This can cause emitting a group which violates PRM restriction for ChanOff: "The execution size (ExecSize) must be a factor of the chosen offset." Signed-off-by: Sviatoslav Peleshko <sviatoslav.peles...@globallogic.com> Reviewed-by: Sagar Ghuge <sagar.gh...@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25657> --- src/intel/compiler/brw_fs_generator.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp index 3331676939f..c6a315a4486 100644 --- a/src/intel/compiler/brw_fs_generator.cpp +++ b/src/intel/compiler/brw_fs_generator.cpp @@ -1680,6 +1680,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width, if (inst->eot && is_accum_used && intel_needs_workaround(devinfo, 14010017096)) { brw_set_default_exec_size(p, BRW_EXECUTE_16); + brw_set_default_group(p, 0); brw_set_default_mask_control(p, BRW_MASK_DISABLE); brw_set_default_predicate_control(p, BRW_PREDICATE_NONE); brw_set_default_flag_reg(p, 0, 0);
