Module: Mesa Branch: main Commit: 98665e024fe0f75d27fe356f6bb3bf887d58995f URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=98665e024fe0f75d27fe356f6bb3bf887d58995f
Author: Sviatoslav Peleshko <sviatoslav.peles...@globallogic.com> Date: Wed Oct 11 12:53:02 2023 +0300 intel/tools/i965_asm: Handle sync instruction Signed-off-by: Sviatoslav Peleshko <sviatoslav.peles...@globallogic.com> Reviewed-by: Sagar Ghuge <sagar.gh...@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25657> --- src/intel/compiler/brw_disasm.c | 1 + src/intel/compiler/brw_eu_defines.h | 1 + src/intel/tools/i965_gram.y | 60 +++++++++++++++++++++++++++++++++++-- src/intel/tools/i965_lex.l | 8 +++++ 4 files changed, 67 insertions(+), 3 deletions(-) diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c index d8c0e97c967..02c7eaa79e4 100644 --- a/src/intel/compiler/brw_disasm.c +++ b/src/intel/compiler/brw_disasm.c @@ -523,6 +523,7 @@ static const char *const sync_function[16] = { [TGL_SYNC_NOP] = "nop", [TGL_SYNC_ALLRD] = "allrd", [TGL_SYNC_ALLWR] = "allwr", + [TGL_SYNC_FENCE] = "fence", [TGL_SYNC_BAR] = "bar", [TGL_SYNC_HOST] = "host", }; diff --git a/src/intel/compiler/brw_eu_defines.h b/src/intel/compiler/brw_eu_defines.h index b22bcf38605..820ac0f4ef5 100644 --- a/src/intel/compiler/brw_eu_defines.h +++ b/src/intel/compiler/brw_eu_defines.h @@ -1396,6 +1396,7 @@ enum tgl_sync_function { TGL_SYNC_NOP = 0x0, TGL_SYNC_ALLRD = 0x2, TGL_SYNC_ALLWR = 0x3, + TGL_SYNC_FENCE = 0xd, TGL_SYNC_BAR = 0xe, TGL_SYNC_HOST = 0xf }; diff --git a/src/intel/tools/i965_gram.y b/src/intel/tools/i965_gram.y index 06f7b9df1f4..a76d3aedd18 100644 --- a/src/intel/tools/i965_gram.y +++ b/src/intel/tools/i965_gram.y @@ -412,6 +412,11 @@ add_label(struct brw_codegen *p, const char* label_name, enum instr_label_type t %token <integer> COS EXP FDIV INV INVM INTDIV INTDIVMOD INTMOD LOG POW RSQ %token <integer> RSQRTM SIN SINCOS SQRT +/* sync instruction */ +%token <integer> ALLRD ALLWR FENCE BAR HOST +%type <integer> sync_function +%type <reg> sync_arg + /* shared functions for send */ %token CONST CRE DATA DP_DATA_1 GATEWAY MATH PIXEL_INTERP READ RENDER SAMPLER %token THREAD_SPAWNER URB VME WRITE DP_SAMPLER @@ -682,10 +687,11 @@ instruction: | binaryaccinstruction | mathinstruction | nopinstruction - | syncinstruction + | waitinstruction | ternaryinstruction | sendinstruction | illegalinstruction + | syncinstruction ; relocatableinstruction: @@ -946,8 +952,8 @@ ternaryopcodes: | MAD ; -/* Sync instruction */ -syncinstruction: +/* Wait instruction */ +waitinstruction: WAIT execsize dst instoptions { brw_next_insn(p, $1); @@ -1492,6 +1498,54 @@ loopinstruction: } ; +/* sync instruction */ +syncinstruction: + predicate SYNC sync_function execsize sync_arg instoptions + { + if (p->devinfo->ver < 12) { + error(&@2, "sync instruction is supported only on gfx12+\n"); + } + + if ($5.file == BRW_IMMEDIATE_VALUE && + $3 != TGL_SYNC_ALLRD && + $3 != TGL_SYNC_ALLWR) { + error(&@2, "Only allrd and allwr support immediate argument\n"); + } + + brw_set_default_access_mode(p, $6.access_mode); + brw_SYNC(p, $3); + i965_asm_set_instruction_options(p, $6); + brw_inst_set_exec_size(p->devinfo, brw_last_inst, $4); + brw_set_src0(p, brw_last_inst, $5); + brw_inst_set_eot(p->devinfo, brw_last_inst, $6.end_of_thread); + brw_inst_set_qtr_control(p->devinfo, brw_last_inst, $6.qtr_ctrl); + brw_inst_set_nib_control(p->devinfo, brw_last_inst, $6.nib_ctrl); + + brw_pop_insn_state(p); + } + ; + +sync_function: + NOP { $$ = TGL_SYNC_NOP; } + | ALLRD + | ALLWR + | FENCE + | BAR + | HOST + ; + +sync_arg: + nullreg region reg_type + { + $$ = $1; + $$.vstride = $2.vstride; + $$.width = $2.width; + $$.hstride = $2.hstride; + $$.type = $3; + } + | immreg + ; + /* Relative location */ relativelocation2: immreg diff --git a/src/intel/tools/i965_lex.l b/src/intel/tools/i965_lex.l index bbb6a27113b..db1ebf14a4e 100644 --- a/src/intel/tools/i965_lex.l +++ b/src/intel/tools/i965_lex.l @@ -130,6 +130,7 @@ subb { yylval.integer = BRW_OPCODE_SUBB; return SUBB; } wait { yylval.integer = BRW_OPCODE_WAIT; return WAIT; } while { yylval.integer = BRW_OPCODE_WHILE; return WHILE; } xor { yylval.integer = BRW_OPCODE_XOR; return XOR; } +sync { yylval.integer = BRW_OPCODE_SYNC; return SYNC; } /* extended math functions */ cos { yylval.integer = BRW_MATH_FUNCTION_COS; return COS; } @@ -158,6 +159,13 @@ sin { yylval.integer = BRW_MATH_FUNCTION_SIN; return SIN; } sqrt { yylval.integer = BRW_MATH_FUNCTION_SQRT; return SQRT; } sincos { yylval.integer = BRW_MATH_FUNCTION_SINCOS; return SINCOS; } + /* sync instruction */ +allrd { yylval.integer = TGL_SYNC_ALLRD; return ALLRD; } +allwr { yylval.integer = TGL_SYNC_ALLWR; return ALLWR; } +fence { yylval.integer = TGL_SYNC_FENCE; return FENCE; } +bar { yylval.integer = TGL_SYNC_BAR; return BAR; } +host { yylval.integer = TGL_SYNC_HOST; return HOST; } + /* shared functions for send instruction */ sampler { return SAMPLER; } dp_sampler { return DP_SAMPLER; }
