On Tue, May 10, 2016 at 1:49 PM, Ernst Sjöstrand <[email protected]> wrote: > Hi, > > nice! The windows driver has an option to limit tessellation factor to x16 > etc, would it be possible to implement something similar in radeonsi? Of > course that's kindof to opposite to actually making x32 and x64 faster like > you're doing here. :-)
That should be possible by changing the R_028A18_VGT_HOS_MAX_TESS_LEVEL in si_state.c to a lower value than 64. Of course for it to be an option someone still has to connect it to drirc or an environment variable. - Bas _______________________________________________ mesa-dev mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-dev
