On Wednesday, June 8, 2016 7:45:43 PM PDT Alejandro Piñeiro wrote: > On 02/06/16 23:09, Kenneth Graunke wrote: > > i965 has no special hardware for this, so the best way to implement > > this is to pass it in via a uniform. > > Is this comment accurate? On the next patch you implement the i965 bits, > and you only do the lowering on gen8+, mentioning that you would like to > do the same on gen7. So for gen7 it is implemented, but an uniform is > not used. Or am I missing something?
i965 hardware doesn't provide gl_PatchVerticesIn in the TCS thread payload, as one might expect. Currently, we implement it as a compile-time constant, and recompile the shader whenever it changes (on all generations). Another way to implement it is to pass it in as a uniform. This is arguably better because it doesn't require recompiling the shader whenever you change the number of vertices in your input patch. The next patch makes it use a uniform and stop recompiling on Gen8+. However, on Gen7, we also have to loop over all the input vertices and emit a URB write message (input release) for every pair. Because we know this at compile time, it's easy to emit the right number of URB write messages. So I left it as is for now (still recompiling). I could instead rework that to use an actual DO..WHILE loop in the shader itself, and then a uniform would work.
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