From: Marek Olšák <marek.ol...@amd.com>
---
src/gallium/drivers/r600/r600_state.c | 31 ++++++++-----------------------
1 file changed, 8 insertions(+), 23 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_state.c
b/src/gallium/drivers/r600/r600_state.c
index b00315d..737d770 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -795,40 +795,20 @@ static void r600_emit_clip_state(struct r600_context
*rctx, struct r600_atom *at
radeon_set_context_reg_seq(cs, R_028E20_PA_CL_UCP0_X, 6*4);
radeon_emit_array(cs, (unsigned*)state, 6*4);
}
static void r600_set_polygon_stipple(struct pipe_context *ctx,
const struct pipe_poly_stipple *state)
{
}
-static struct r600_resource *r600_buffer_create_helper(struct r600_screen
*rscreen,
- unsigned size, unsigned
alignment)
-{
- struct pipe_resource buffer;
-
- memset(&buffer, 0, sizeof buffer);
- buffer.target = PIPE_BUFFER;
- buffer.format = PIPE_FORMAT_R8_UNORM;
- buffer.bind = PIPE_BIND_CUSTOM;
- buffer.usage = PIPE_USAGE_DEFAULT;
- buffer.flags = 0;
- buffer.width0 = size;
- buffer.height0 = 1;
- buffer.depth0 = 1;
- buffer.array_size = 1;
-
- return (struct r600_resource*)
- r600_buffer_create(&rscreen->b.b, &buffer, alignment);
-}
-
static void r600_init_color_surface(struct r600_context *rctx,
struct r600_surface *surf,
bool force_cmask_fmask)
{
struct r600_screen *rscreen = rctx->screen;
struct r600_texture *rtex = (struct r600_texture*)surf->base.texture;
unsigned level = surf->base.u.tex.level;
unsigned pitch, slice;
unsigned color_info;
unsigned color_view;
@@ -991,36 +971,41 @@ static void r600_init_color_surface(struct r600_context
*rctx,
r600_texture_get_fmask_info(&rscreen->b, rtex, 8, &fmask);
/* CMASK. */
if (!rctx->dummy_cmask ||
rctx->dummy_cmask->b.b.width0 < cmask.size ||
rctx->dummy_cmask->buf->alignment % cmask.alignment != 0) {
struct pipe_transfer *transfer;
void *ptr;
r600_resource_reference(&rctx->dummy_cmask, NULL);
- rctx->dummy_cmask = r600_buffer_create_helper(rscreen,
cmask.size, cmask.alignment);
+ rctx->dummy_cmask = (struct r600_resource*)
+ r600_aligned_buffer_create(&rscreen->b.b, 0,
+ PIPE_USAGE_DEFAULT,
+ cmask.size,
cmask.alignment);
/* Set the contents to 0xCC. */
ptr = pipe_buffer_map(&rctx->b.b,
&rctx->dummy_cmask->b.b, PIPE_TRANSFER_WRITE, &transfer);
memset(ptr, 0xCC, cmask.size);
pipe_buffer_unmap(&rctx->b.b, transfer);
}
r600_resource_reference(&surf->cb_buffer_cmask,
rctx->dummy_cmask);
/* FMASK. */
if (!rctx->dummy_fmask ||
rctx->dummy_fmask->b.b.width0 < fmask.size ||
rctx->dummy_fmask->buf->alignment % fmask.alignment != 0) {
r600_resource_reference(&rctx->dummy_fmask, NULL);
- rctx->dummy_fmask = r600_buffer_create_helper(rscreen,
fmask.size, fmask.alignment);
-
+ rctx->dummy_fmask = (struct r600_resource*)
+ r600_aligned_buffer_create(&rscreen->b.b, 0,
+ PIPE_USAGE_DEFAULT,
+ fmask.size,
fmask.alignment);
}
r600_resource_reference(&surf->cb_buffer_fmask,
rctx->dummy_fmask);
/* Init the registers. */
color_info |= S_0280A0_TILE_MODE(V_0280A0_FRAG_ENABLE);
surf->cb_color_cmask = 0;
surf->cb_color_fmask = 0;
surf->cb_color_mask =
S_028100_CMASK_BLOCK_MAX(cmask.slice_tile_max) |
S_028100_FMASK_TILE_MAX(fmask.slice_tile_max);
}
--
2.7.4
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